SIMD processor with multi-port memory unit
OwnerAdrian John Anderson, Gary Christopher Wassinventors
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Abstract
A plurality of single port memories are provided for use with a single instruction multiple data processor. These are operable as a multi-port memory with simultaneous access to the plurality of single port memories. The apparatus is operable to send an access request for a plurality of memory locations to the locations in a known order. This request is then reordered to be suitable for application to the single port memories. The memories are then accessed and the data reordered to conform with the access request format.
Claims18
A method for simultaneously reading a plurality of single port memories for use with a single instruction multiple data (SIMD) processor whereby the plurality of memories operates as a multi-port memory comprising the steps of
- sending read requests for a plurality of memory locations to the memories in a known order;
- reordering the read requests to be suitable for application to the single port memories;
- accessing the memories;
- and
- reordering the data read from the memory locations to match the order of the original requests.
A method according to any previous claim in which the reordering step operates on a stream of memory read requests.
A method for simultaneously writing to a plurality of single port memories for use with a single instruction multiple data (SIMD) processor whereby the plurality of memories operates as a multi-port memory comprising the steps of:
- sending write requests for a plurality of memory locations to the memories in a known order;
- reordering the write requests to be suitable for application to the single port memories;
- and
- accessing the memories.
A plurality of single port memories for use with an SIMD processor and operable as a multi-port memory with simultaneous access to the plurality of single port memories comprising:
- means for sending an access request for a plurality of memory locations to the memories in a known order;
- means for reordering the access request to be suitable for application to the single port memories;
- means for accessing the memories;
- means for reordering data read from the memories on an access request.
Dependencies are inferred from the claim text.