Dynamically managing saved processor soft states
AssigneeInternational Business Machines Corporation
InventorsRavi Kumar Arimilli, Robert Alan Cargnoni, Guy Lynn Guthrie, William John Starke
Life of this patent
Estimating the term…
Abstract
A method and system are disclosed for managing stored soft state information, such as the contents of cache memory and address translation information that are non-critical for executing a process within a processor. The soft states of idle processes are stored in system memory in virtual caches. Cache coherency of the soft states is maintained by snooping kill-type operations against the virtual caches in system memory.
Claims14
A method of managing saved process states in memory, the method comprising:
- storing a soft state of an idle process within a system memory at a lowest level of a volatile memory hierarchy;
- in response to a memory controller of the system memory receiving a kill type operation specifying an address, snooping the kill type operation against the soft state in the system memory;
- and
- in response to the snooping resulting in a snoop hit, invalidating data within the soft state associated with the address.
A processing unit comprising:
- means for storing a soft state of an idle process within a system memory at a lowest level of a volatile memory hierarchy;
- means, responsive to receiving a kill type operation specifying an address, for snooping the kill type operation against the soft state in the system memory;
- and
- means, responsive to the snooping resulting in a snoop hit, for invalidating data within the soft state associated with the address
A processing unit comprising:
- at least one execution unit;
- an instruction sequencing unit, coupled to the at least one execution unit, that issues instructions to the at least one execution unit;
- a cache memory coupled to the at least one execution unit;
- and
- a memory controller coupled to the cache memory, wherein, responsive to the processing unit receiving an interrupt, the memory controller saves a soft state of the processor to an associated memory, and wherein the memory controller, responsive to receiving a kill type operation specifying an address, snoops the kill type operation against the soft state in the associated memory, and responsive to the snooping resulting in a snoop hit, invalidates data within the soft state associated with the address.
Dependencies are inferred from the claim text.