Ring-topology based multiprocessor data access bus

A method of employing a ring bus, comprising:

• transmitting indicia of a selected APU;
• transmitting indicia of a memory address associated with the selected APU after a first predetermined number of clock cycles;
• and
• transmitting or receiving data to or from the memory address associated with the targeted APU after a second predetermined number of clock cycles.

A method of employing a bus, comprising:

• receiving indicia of a targeting of one of a plurality of APUs;
• issuing a no access to local store command by the targeted APU;
• receiving indicia of a memory location by the selected APU after a first predetermined number of clock cycles;
• and
• transmitting or receiving data from the memory location after a second predetermined number of clock cycles.

A computer program product for employing a ring bus, the computer program product having a medium with a computer program embodied thereon, the computer program comprising:

• computer code for transmitting indicia of a selected APU;
• computer code for transmitting indicia of a memory address associated with the selected APU after a first predetermined number of clock cycles;
• and
• computer code for transmitting or receiving data to or from the memory address associated with the targeted APU after a second predetermined number of clock cycles.

A processor for employing a ring bus, the processor including a computer program comprising:

• computer code for transmitting indicia of a selected APU;
• computer code for transmitting indicia of memory address associated with the selected APU after a first predetermined number of clock cycles;
• and
• computer code for transmitting or receiving data to or from the memory address associated with the targeted APU after a second predetermined number of clock cycles.