Limit circuit
AssigneesNiigata Seimitsu Co., Ltd., Ricoh Company, Ltd.
InventorHiroshi Miyagi
Life of this patent
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Abstract
A limit circuit capable of providing high gain. The limit circuit included in an FM receiver comprises, for example, seven amplifiers (11 to 17), and a BPF (18) inserted substantially in the middle thereof. Each of the amplifiers (1 I to 17) operates as a differential amplifier, and has a gain of about 13 dB. The BPF (18) serving as a limit circuit passes components in a bandwidth wider than the bandwidth of the signal to be amplified. The level of 1/f noise and heat noise can be reduced by eliminating low-frequency components and high-frequency components of the Signal amplified by the four amplifiers (11 to 14), respectively. Therefore, each of the amplifiers (15 to 17) connected to the rear end of the BPF (18) is not animated by the noise component.
Claims38
A limit circuit provided in a foregoing stage to a detection circuit of a receiver, comprising:
- amplifiers cascaded in a plurality of stages and;
- a bandpass filter inserted in a middle stage of said plurality of amplifiers,
- wherein a passing frequency band of said bandpass filter is set wider than a band of a detected signal inputted to said detection circuit.
A limit circuit provided in a foregoing stage to a detection circuit of a receiver, comprising:
- amplifiers cascaded in a plurality of stages,
- wherein said amplifier in each stage has high-frequency component elimination unit for eliminating components higher-frequency than an upper limit of a band of a detect d signal inputted to said detection circuit and low-frequency component elimination unit for eliminating the components lower-frequency than a lower limit of the band of the detected signal.
A limit circuit provided in a foregoing stage to a detection circuit of a receiver, comprising:
- amplifiers cascaded in a plurality of stages,
- wherein said amplifier in each stage has high-frequency component elimination unit for eliminating components higher-frequency than an upper limit of a band of a detected signal inputted to said detection circuit;
- and
- a feedback circuit for feeding back the components lower-frequency than a lower limit of the band of said detected signal included in the output signal of said amplifier in the final stage to said amplifier in a first stage in a reversed phase.
A limit circuit provided in a foregoing stage to a detection circuit of a receiver, comprising:
- amplifiers cascaded in a plurality of stages,
- wherein p-channel type FETs are used as amplifying elements included in said amplifiers in up to m-th stage at least.
Dependencies are inferred from the claim text.