Timing adjustment circuit, drive circuit, electrooptic device and electronic equipment
AssigneeSeiko Epson Corporation
InventorShin Fujita
Life of this patent
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Abstract
To facilitate the estimation of the delay time between an input and an output. Inverters INV1 and INV4 generate a reference signal R and a signal to-be-corrected H on the basis of an input positive-logic signal Pin and an input negative-logic signal Nin. Since the reference signal R is transferred through a wiring line Lp, it undergoes no delay in the process of the transfer. On the other hand, the signal to-be-corrected H undergoes the influence of the reference signal R and has its phase corrected by a NAND circuit 11 and a NOR circuit 12.
Claims16
A timing adjustment circuit which is fed with an input positive-logic signal that is asserted at its high level, and an input negative-logic signal that is asserted at its low level, and which generates an output positive-logic signal and an output negative-logic signal that have their phase difference decreased, characterized by comprising:
- a signal generation portion which generates a reference signal on the basis of either of the input positive-logic signal and the input negative-logic signal, and which generates a signal to-be-corrected on the basis of the other signal;
- and
- a correction portion which corrects the signal to-be-corrected on the basis of the reference signal;
- wherein said reference signal is delivered as one of the output positive-logic signal and the output negative-logic signal, while a signal obtained by correcting said signal to-be-corrected by means of the first correction circuit and the second correction circuit is delivered as the other of said output positive-logic signal and said output negative-logic signal.
A timing adjustment circuit characterized in that said correction portion includes:
- a first correction portion which corrects a timing of a trailing edge of said signal to-be-corrected on the basis of a leading edge of said reference signal;
- and
- a second correction portion which corrects a timing of a leading edge of said signal to-be-corrected on the basis of a trailing edge of said reference signal.
Dependencies are inferred from the claim text.