Method and related apparatus for locking phase with estimated rate modified by rate ditehring

A phase lock circuit for providing a clock synchronized with an input signal, the input signal comprising a plurality of data, the phase lock circuit comprising:

• a measuring module for generating an estimated rate according to transitions of the input signal;
• a dithering module coupled to the measuring module for updating the estimated rate by multiplying the estimated rate by a predetermined ratio;
• and
• an oscillator for adjusting a frequency of the clock synchronized with an input signal according to the updated estimated rate in the dithering module to make the frequency of the clock correspond to the updated estimated rate;
• wherein after the dithering module updates the estimated rate, the predetermined ratio is modified to multiply the estimated rate by a modified predetermined ratio for updating the estimated rate in the dithering module when the dithering module generates another updated estimated rate.

A method for locking phase by providing a comparing clock synchronized with an input signal, the input signal comprising a plurality of data, the method comprising:

• generating a frequency adjustment value according to the input signal;
• generating a dithering estimated value according to the input signal through a dithering step;
• setting a dithering estimated value as a new comparing clock when a synchronization error between the comparing clock and the input signal exceeds a predetermined value;
• and
• comparing the new comparing clock with the input signal in order to adjust the new comparing clock.