System and method for switching clock sources
OwnerEdward Angladainventor
Life of this patent
Estimating the term…
Abstract
A system and method for switching clock sources is presented. The disclosed approach permits an external controller to switch a clock source for a plurality of system boards. The external controller generates a command, which is relayed to system boards on a multi-system chassis. Each system board receives the command and switches its clock source in response to the received command.
Claims25
A clock-source-switching system comprising:
- an external controller configured to generate an inter-integrated circuit (I2C) command;
- a back-plane electrically coupled to the external controller, the back-plane having a plurality of system board receptacles, the back-plane being configured to receive the I2C command from the external controller and relay the I2C command using the plurality of system board receptacles;
- a plurality of system boards, each system board comprising:
- a low-overhead bus configured to engage one of the plurality of system board receptacles of the back-plane, the low-overhead bus being configured to receive the I2C command from the back-plane;
- a main clock configured to generate a main clock signal;
- a clock-bypass circuit configured to receive the I2C command and generate a secondary clock signal and a clock-select signal in response to the received I2C command;
- and
- a clock-selection circuit configured to receive the secondary clock signal and the clock-select signal from the clock-bypass circuit, the clock-selection circuit further being configured to receive the main clock signal from the main clock and select either the main clock signal or the secondary clock signal in response to the clock-select signal.
A clock-source-switching system comprising:
- a low-overhead bus configured to receive a command from an external controller;
- a main clock configured to generate a main clock signal;
- a clock-bypass circuit configured to receive the command and generate a secondary clock signal and a clock-select signal in response to the received command;
- and
- a clock-selection circuit configured to receive the secondary clock signal and the clock-select signal from the clock-bypass circuit and receive the main clock signal from the main clock, the clock-selection circuit further being configured to select either the main clock signal or the secondary clock signal in response to the clock-select signal.
In a system having a back-plane configured to receive a plurality of system boards, a clock-source switching method comprising:
- generating a command from an external source;
- and
- switching clock sources on each of the plurality of system boards in response to the generated command.
In a system having a back-plane configured to receive a plurality of system boards, each system board having a main clock configured to generate a main clock signal, a clock-source switching method comprising:
- receiving a command from an external source;
- generating a secondary clock signal and a clock-select signal in response to the received command;
- receiving the main clock signal, the secondary clock signal, and the clock-select signal;
- selecting either the received main clock signal or the secondary clock signal in response to the value of the clock-select signal;
- and
- outputting the selected signal.
In a system having a back-plane configured to receive a plurality of system boards, a clock-source switching system comprising:
- means for generating a command from an external source;
- and
- means for switching clock sources on each of the plurality of system boards in response to the generated command.
In a system having a back-plane configured to receive a plurality of system boards, each system board having a main clock configured to generate a main clock signal, a clock-source switching system comprising:
- means for receiving a command from an external source;
- means for generating a secondary clock signal and a clock-select signal in response to the received command;
- means for receiving the main clock signal, the secondary clock signal, and the clock-select signal;
- means for selecting either the received main clock signal or the secondary clock signal in response to the value of the clock-select signal;
- and
- means for outputting the selected signal.
Dependencies are inferred from the claim text.