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AssigneeRenesas Technology Corp.
InventorsYasuo Sugure, Tomomi Ishikura, Kazuya Hirayanagi, Takeshi Kataoka, Seiji Takeuchi, Hiromichi Yamada, Takanaga Yamazaki
Estimating the term…
The present invention prevents a data processor from undesirable operation stop due to an overflow of a plurality of register banks. A status register includes an overflow flag to indicate an overflow of the plurality of register banks. When an interrupt exception occurs in a state in which data has been saved to all banks of the register banks, and the accepted interrupt exception is permitted to use the register banks, a central processing unit saves data of a register set to a stack area and reflects an overflow state in the overflow flag. When the overflow flag indicates an overflow state, if data restoration from the register banks to the register set is directed, the central processing unit restores the data from the stack area to the register set.
A data processor using a status register and a plurality of register banks to execute instructions,
A data processor comprising:
A data processor that uses a predetermined register set and a plurality of register banks to execute instructions,
A data processor including a predetermined register set and a plurality of register banks corresponding to the predetermined register set,
Dependencies are inferred from the claim text.