System and method for dynamically allocating shared memory within a multiple function device
OwnerDaniel Mulliganinventor
Life of this patent
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Abstract
An apparatus and method that provides dynamic buffer allocation of shared memory within a multiple function integrated circuit. This apparatus includes a processing module and shared memory coupled to the processing module. Shared memory stores operational instructions for the processing module based on the mode of operation. The multiple function integrated circuit identifies active modules operably coupled to the multiple function integrated circuit that require buffered memory. The circuit further determines the buffer requirements for the identified active module(s) and allocates shared memory into buffers for use by the active modules.
Claims20
A method for dynamic buffer allocation of shared memory within a multiple function integrated circuit, the method comprises:
- determining mode of operation of the multiple function integrated circuit;
- identifying at least one active module of a plurality of modules of the multiple function integrated circuit requiring a buffer based on the mode of operation;
- determining buffer requirements for the at least one active module;
- and
- allocating memory space of the shared memory for the buffer to be used by the at least one active module.
A method for dynamic buffer allocation of shared memory within a multiple function integrated circuit during initialization of the multiple function integrated circuit, the method comprises:
- determining a first mode of operation of the multiple function integrated circuit;
- identifying at least one active module of a plurality of modules of the multiple function integrated circuit requiring a buffer based on the first mode of operation;
- determining buffer requirements for the at least one active module;
- and
- allocating memory space of the shared memory for a buffer to be used by the at least one active module.
An apparatus for dynamic buffer allocation of shared memory within a multiple function integrated circuit, the apparatus comprises:
- processing module;
- and
- memory operably coupled to the processing module, wherein at least portion of the memory functions as the shared memory and wherein the memory stores operational instructions that cause the processing module to:
- detect activation of the multiple function integrated circuit;
- determine a first mode of operation of the multiple function integrated circuit;
- identify the at least one active modules of the multiple function integrated circuit requiring a buffer based on the first mode of operation;
- determine buffer requirements for the at least one identified active module;
- and
- allocate memory space within the RAM for a buffer to be used by the at least one active module.
Dependencies are inferred from the claim text.