Computer system and memory control method
OwnerYoshihiro Nishidainventor
Life of this patent
Estimating the term…
Abstract
A computer system has two CPUs. A shared memory exchanges data between the two CPUs. When the first CPU writes data in the shared memory, an address determination unit determines whether the address of the written data is in a predetermined area. A significance determination unit determines whether the written data is significant that should be immediately processed by the second CPU. If the address determination unit and the significance determination unit determine that the address is in the predetermined area and that the data is significant, an interrupt signal is supplied to an interrupt controller.
Claims10
A computer system comprising:
- a memory;
- a first processor which writes writing data into the memory;
- a second processor;
- and
- a controller which instructs the second processor to process the writing data based on attribute data representing an attribute of the writing data.
A computer system comprising:
- a memory;
- a first processor which writes writing data into the memory;
- a second processor;
- a register;
- and
- a write detecting unit which detects that the first processor writes the writing data into the memory and stores in the register an address on the memory of the writing data,
- wherein the second processor reads the writing data based on the address stored in the register.
A memory control method for controlling a computer system comprising a memory, a first processor which writes writing data into the memory, a second processor, and a controller which instructs the second processor to process the writing data, the method comprising:
- receiving attribute data representing an attribute of the writing data from the first processor;
- and
- determining whether the controller instructs the second processor to process the writing data based on the attribute data.
A memory control method for controlling a computer system comprising a memory, a first processor which writes writing data into the memory, a second processor, a register, and write monitoring means which stores in the register an address on the memory of the writing data,
- wherein the second processor reads the writing data. based on the address stored in the register.
Dependencies are inferred from the claim text.