Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device

A method for manufacturing a semiconductor integrated circuit device comprising the steps of:

• (a) forming isolation trenches in isolation regions with relatively different planar dimensions on a semiconductor substrate;
• (b) filling said isolation trenches up to predetermined middle position in their depth direction with a first insulating film deposited by a coating method;
• and
• (c) filling a remaining depth portion of said isolation trenches into which said first insulating film is filled with a second insulating film;
• and
• forming dummy patterns in a relatively large isolation region of isolation regions with relatively different planar dimensions before said first insulating film is deposited.

A method for manufacturing a semiconductor integrated circuit device comprising the step of:

• (a) forming an isolation trench in an isolation region of a semiconductor substrate;
• (b) filling said isolation trench up to predetermined middle position in its depth direction with a first insulating film deposited by a coating method;
• (c) filling a remaining depth portion of said isolation trench into which said first insulating film is filled with a second insulating film;
• (d) forming a plurality of patterns on said semiconductor substrate after said step (c);
• (e) filling a trench forming between said plurality of patterns up to predetermined middle position in a trench depth direction with a third insulating film deposited by a coating method;
• and
• (f) filling a remaining portion of said trench into which said third insulating film, is filled with a fourth insulating film being more difficult to etch than said third insulating film;
• and
• forming dummy patterns in a relatively large isolation region of isolation regions with relatively different planar dimensions when said isolation trenches are formed.

A method for manufacturing a semiconductor integrated circuit device comprising the steps of:

• (a) forming isolation trenches in isolation regions with relatively different planar dimensions on a semiconductor substrate;
• (b) filling said isolation trenches up to predetermined middle position in their depth direction with a first insulating film deposited by a coating method;
• (c) filling a remaining depth portion of said isolation trenches into which said first insulating film is filled with a second insulating film;
• and
• forming dummy patterns between said isolation trenches in a relatively large isolation region of isolation regions with relatively different planar dimensions when said isolation trenches are formed such that a planer dimension difference and depth dimension difference of said isolation trenches in said isolation regions with relatively different planar dimensions, respectively, are small.

A method for manufacturing a semiconductor integrated circuit device comprising the steps of:

• a) forming isolation trenches in isolation regions with relatively different planar dimensions on a semiconductor substrate;
• b) filling said isolation trenches up to predetermined middle position in their depth direction with a first insulating film deposited by a coating method;
• c) filling a remaining depth portion of said isolation trenches into which said first insulating film is filled with a second insulating film;
• and
• forming dummy patterns between said isolation trenches in a relatively large isolation region of isolation regions with relatively different planar dimensions when said isolation trenches are formed such that a planer dimension and depth dimension of said isolation trenches in said isolation regions with relatively different planar dimensions, respectively are equal in design.

A method for manufacturing a semiconductor integrated circuit device comprising the steps of:

• (a) forming a plurality of patterns, which are adjacent to each other, on a semiconductor substrate;
• (b) filling a trench formed between said plurality of patterns, which are adjacent to each other, up to predetermined middle position in its depth direction with a first insulating film deposited by a coating method;
• and
• (c) filling a remaining depth portion of said trench into which said first insulating film is filled with a second insulating film.

A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

• (a) forming a plurality of word lines adjacent to each other on a semiconductor substrate, which form a gate electrode of a field effect transistor for memory cell selection;
• (b) depositing an insulating film on said semiconductor substrate so as to cover a surface of said plurality of word lines;
• (c) filling a trench formed between said plurality of word lines up to predetermined middle position in its depth direction with a first insulating film deposited by a coating method;
• (d) filling a remaining depth portion of said trench into which said first insulating film is filled trench into which said first insulating with a second insulating film deposited by a chemical vapor deposition method;
• (e) punching a hole on said insulating film and said first and second insulating films between said adjacent plurality of word lines so as to reach to a pair of semiconductor regions of said field effect transistor for memory cell selection;
• (f) forming a bit line electrically connected to one semiconductor region of said pair of semiconductor regions of said field effect transistor for said memory cell selection through said hole;
• and
• (g) forming an information storage capacitor element electrically connected to the other semiconductor region of said pair of semiconductor regions of said field effect transistor for memory cell selection through said hole,
• the step of punching a hole on said insulating film and said first and second insulating films comprising the steps of:
• performing etching processing on said insulating film and said first and second insulating films by having a relatively large etching selection ratio between said insulating film and said first and second insulating films and under condition that said first and second insulating films are easier to be etched and removed than said insulating film, and then performing etching processing on said insulating film and said first and second insulating films under condition that said insulating film is easier to be etched and removed than said first and second insulating films.

A semiconductor integrated circuit device, comprising:

• a plurality of field effect transistors for memory cell selection formed on a semiconductor substrate;
• a plurality of word lines, which are wires forming a gate electrode of said field effect transistor for memory cell selection, formed adjacent to each other on a main surface of said semiconductor substrate;
• an insulating film on said semiconductor substrate so as to cover a surface of said plurality of word lines;
• a first insulating film deposited by a coating method so as to fill a trench formed between said plurality of word lines up to predetermined middle position in its depth direction;
• a second insulating film deposited by a chemical vapor deposition method so as to fill a remaining depth portion of said trench into which said first insulating film is filled;
• a hole arranged two-dimensionally between said adjacent plurality of word lines and formed on said insulating film and said first and second insulating films so as to expose a pair of semiconductor regions of said field effect transistor for memory cell selection;
• a bit line electrically connected to one semiconductor region of said pair of semiconductor regions of said field effect transistor for said memory cell selection through said hole;
• and
• an information storage capacitor element electrically connected to the other semiconductor region of said pair of semiconductor regions of said field effect transistor for memory cell selection through said hole.

A method for manufacturing a semiconductor integrated circuit device comprising the step of:

• (a) forming an isolation trench in an isolation region of a semiconductor substrate
• (b) filling said isolation trench up to predetermined middle position in its depth direction with a first insulating film deposited by a coating method;
• (c) filling a remaining depth portion of said isolation trench into which said first insulating film is filled with a second insulating film;
• (d) forming a plurality of patterns on said semiconductor substrate after said step (c);
• (e) filling a trench forming between said plurality of patterns up to predetermined middle position in a trench depth direction with a third insulating film deposited by a coating method;
• (f) filling a remaining portion of said trench into which said third insulating film is filled with a fourth insulating film being more difficult to etch than said third insulating film;
• and
• (g) forming a hole on said semiconductor substrate by etching said fourth insulating film and said third insulating film.
• (h) filling a conductive layer into said hole;
• (i) after said step (h), forming a fifth insulating film on said fourth insulating film and said conductive layer;
• and
• (j) forming a hole exposing said conductive layer in said fifth insulating film by etching said fifth insulating film.