Bitline structure for DRAM and method of forming the same
AssigneeNanya Technology Corporation
InventorKuo-Chien Wu
Life of this patent
Estimating the term…
Abstract
A bitline structure for DRAM and the method for forming the same. The bitline structure includes a first dielectric layer on a substrate, a bitline contact hole, formed through the first dielectric layer, a bitline contact, formed in the bitline contact hole, a second dielectric layer, formed on the first dielectric layer and covering the bitline contact, a peripheral contact hole, formed through the first dielectric layer and the second dielectric layer, a peripheral contact, formed in the peripheral contact hole, a first bitline, formed in the second dielectric layer and contacting the bitline contact, and a second bitline, formed in the second dielectric layer and contacting the peripheral contact.
Claims20
A method for forming bitlines for DRAM, comprising:
- providing a semiconductor substrate having a first dielectric layer formed thereon through which a contact hole is formed;
- filling the contact hole with conductive material to form a first conductive layer and etching back the first conductive layer to below the first dielectric layer;
- widening the opening of the contact hole by isotropic etching to form a first opening;
- filling the first opening with conductive layer to form a bitline contact landing;
- forming a second dielectric layer on the first dielectric layer to cover the bitline contact landing;
- forming a peripheral contact hole and defining a first bitline trench to expose the bitline contact landing simultaneously;
- defining a second bitline trench in the second dielectric layer to expose the peripheral contact hole;
- and
- filling the peripheral contact hole, the first bitline trench and the second bitline trench with conductive material to form a contact to a peripheral, a first bitline and a second bitline.
A method for forming bitlines for DRAM, comprising:
- providing a semiconductor substrate having a first dielectric layer formed thereon and a contact hole through the dielectric layer;
- filling the contact hole with conductive material to form a first conductive layer;
- forming a second dielectric layer on the first dielectric layer to cover the first conductive layer;
- forming a peripheral contact hole and defining a first bitline trench in the second dielectric layer;
- defining a second bitline trench in the second dielectric layer to expose the peripheral contact hole;
- and
- filling the peripheral contact hole, the first bitline trench and the second bitline trench with conductive material to form a peripheral contact, a first bitline and a second bitline.
A bitline structure for DRAM, comprising:
- a substrate;
- a first dielectric layer, formed on the substrate;
- a bitline contact hole, through the first dielectric layer;
- a bitline contact, formed in the bitline contact hole;
- a second dielectric layer, formed on the first dielectric layer and covering the bitline contact;
- a peripheral contact hole, formed through the first dielectric layer and the second dielectric layer;
- a peripheral contact, formed in the peripheral contact hole;
- a first bitline, formed in the second dielectric layer and contacting the bitline contact;
- and
- a second bitline, formed in the second dielectric layer and contacting the peripheral contact.
Dependencies are inferred from the claim text.