Gate structure with independently tailored vertical doping profile
AssigneeInternational Business Machines Corporation
InventorsOmer Dokumaci, Bruce B. Doris, Oleg Gluschenkov, Jack A. Mandelman, Carl Radens
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Abstract
A gate structure for a semiconductor transistor is disclosed. In an exemplary embodiment, the gate structure includes a lower polysilicon region doped at a first dopant concentration and an upper polysilicon region doped at a second concentration, with the second concentration being different than the first concentration. A conductive barrier layer is disposed between the lower and the upper polysilicon regions, wherein the conductive barrier layer prevents diffusion of impurities between the lower and the upper polysilicon regions.
Claims6
A method for forming a gate structure for a semiconductor transistor, the comprising:
- forming a lower polysilicon region on a gate dielectric layer;
- implanting said lower polysilicon region with a dopant at a first dopant concentration;
- forming a conductive barrier layer upon said lower polysilicon region;
- forming an upper polysilicon region upon said conductive barrier layer;
- and
- implanting said upper polysilicon region with dopant at a second dopant concentration, said second concentration being different than said first concentration.
Dependencies are inferred from the claim text.