Compact electronic device and process of manufacturing the same

A process of manufacturing an integrally packaged compact electronic device, comprising the steps of:

• providing a matrix substrate having a plurality of pre-defined packaging regions each for forming the compact electronic device;
• mounting at least one semiconductor chip and at least one passive component on each of the packaging regions;
• electrically connecting the chips and the passive components to the substrate;
• placing the substrate mounted with the chips and the passive components in a mold, and forming an encapsulation body to integrally encapsulate the chips and the passive components;
• and
• singulating the substrate to cut through the encapsulation body and separate apart the plurality of packaging regions so as to form a plurality of the compact electronic devices.

A compact electronic device, comprising:

• a substrate having a first surface and a second surface opposite to the first surface, wherein a plurality of conductive traces are formed on the first surface, and a plurality of terminals are formed on the second surface and exposed outside to serve as input/output connections of the compact electronic device, and wherein the conductive traces on the first surface are electrically connected to the terminals on the second surface by a plurality of vias formed through the substrate;
• at least one semiconductor chip mounted on the first surface of the substrate and electrically connected to the substrate through a plurality of conductive elements;
• at least one passive component mounted on and electrically connected to the first surface of the substrate;
• and
• an encapsulation body formed on the first surface of the substrate for integrally encapsulating the chip and the passive component.