Method of doping silicon, metal doped silicon, method of making solar cells, and solar cells
AssigneeBoard of Trustees of the University of Arkansas
InventorsHameed A. Naseem, M. Shahidul Haque, William D. Brown
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Abstract
A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.
Claims62
A process for forming a polycrystalline semiconductor portion on a substrate, the method comprising the steps of:
- (a) depositing semiconductor onto the substrate to form a semiconductor layer having an amorphous region;
- (b) depositing a metal onto the semiconductor layer to form a structure comprising the substrate, semiconductor layer and a doping metal layer;
- (c) annealing the structure at a temperature in the range of about 170° C. to about 600° C. to convert at least a portion of the amorphous region into polycrystalline semiconductor.
A process for forming a polycrystalline semiconductor layer on a substrate, wherein the substrate comprises a semiconductor layer thereon having an amorphous region, and comprises a metal layer supported on the amorphous semiconductor layer, the method comprising the step of:
- (a) annealing the structure at a temperature in the range of about 170° C. to about 600° C. to convert at least a portion of the amorphous region into polycrystalline semiconductor.
Polycrystalline semiconductor comprising greater than about 1×1020 aluminum atoms per cm3 of silicon.
In a process for manufacturing a semiconductor device, the improvement of forming a semiconductor junction by a method comprising:
- (a) providing a semiconductor substrate;
- (b) depositing a layer of amorphous silicon onto said semiconductor substrate to form a structure comprising the semiconductor substrate and the layer of amorphous silicon;
- (c) depositing a layer of metal onto said layer of amorphous silicon to form a structure comprising the semiconductor substrate, the layer of amorphous silicon, and the layer of metal;
- and
- (d) without depositing any additional layers onto the metal layer, annealing the structure formed in step (c) at a temperature in the range of about 170° C. to about 600° C. to convert at least a portion of the amorphous silicon layer into crystalline silicon, wherein the metal promotes the conversion of the at least a portion of the amorphous region into the crystalline silicon to provide a semiconductor junction between said crystalline silicon and said semiconductor substrate.
In a process for manufacturing a semiconductor device, the improvement of forming a p-n junction by a method comprising:
- (a) providing a crystalline silicon semiconductor substrate of a first conductivity type;
- (b) depositing a layer of amorphous silicon onto said semiconductor substrate to form a structure comprising the semiconductor substrate and the layer of amorphous silicon;
- (c) depositing a layer of doping metal onto said layer of amorphous silicon to form a structure comprising the semiconductor substrate, the layer of amorphous silicon, and the layer of doping metal, wherein said doping metal is selected to provide a dopant of a second conductivity type opposite to that of the semiconductor substrate;
- and
- (d) without depositing any additional layers onto the metal layer, annealing the structure formed in step (c) at a temperature in the range of about 170° C. to about 600° C. to convert at least a portion of the amorphous silicon layer into crystalline silicondoped with the doping metal, wherein the doping metal promotes the conversion of the at least a portion of the amorphous silicon layer into crystalline silicon so as to provide a semiconductor junction between that crystalline silicon and said crystalline silicon substrate.
A process for making a semiconductor junction, comprising:
- (a) depositing a semiconductor layer having an amorphous region onto a semiconductor surface;
- (b) depositing a layer of metal onto the amorphous region of the semiconductor layer to form a structure comprising the semiconductor surface, the semiconductor layer, and the metal layer;
- and
- (c) without depositing any additional layers onto the metal layer, annealing the structure formed in step (b) at a temperature in the range of about 170° C. to about 600° C. so as to convert at least a portion of the amorphous region into a crystalline semiconductor having a junction with the semiconductor surface, wherein the metal of a first portion of the metal layer promotes the conversion of the at least a portion of the amorphous region into the crystalline semiconductor.
A process for making a semiconductor junction, comprising:
- (a) providing a structure including a semiconductor surface, a semiconductor layer having an amorphous region on the semiconductor surface, and a metal outer layer on the amorphous region;
- (b) annealing the structure provided in step (a) at a temperature in the range of about 170° C. to about 600° C. so as to convert at least a portion of the amorphous region into a crystalline semiconductor having a junction with the semiconductor surface, wherein the metal of a portion of the metal layer promotes the conversion of the at least a portion of the amorphous region into the crystalline semiconductor.
A process for making a semiconductor junction, comprising:
- (a) providing a structure including a semiconductor layer having an amorphous semiconductor region disposed thereon, and metal on the amorphous region with no additional layer being formed over the metal;
- (b) annealing the structure provided in step (a) at a temperature in the range of about 170° C. to about 600° C. so as to convert at least a portion of the amorphous region into a crystalline semiconductor having a junction with the semiconductor layer, wherein the metal includes a portion that promotes the conversion of the at least a portion of the amorphous region into the crystalline semiconductor.
A structure for use in manufacturing a semiconductor device consisting of:
- (a) a lower single crystalline silicon substrate;
- (b) an intermediate amorphous silicon semiconductor layer in contact with said single crystalline silicon substrate;
- and
- (c) an uppermost metal layer in contact with said amorphous silicon semiconductor layer.
A structure for use in manufacturing a semiconductor device consisting of comprising:
- (a) a lower single crystalline silicon substrate;
- (b) an intermediate polycrystalline silicon semiconductor layer in contact with said single crystalline silicon substrate;
- (c) an uppermost metal layer in contact with said polycrystalline silicon semiconductor layer.
A semiconductor device consisting of:
- (a) a lower single crystalline silicon substrate of a first conductivity type;
- (b) an intermediate polycrystalline silicon layer in contact with said single crystalline silicon substrate, said polycrystalline silicon layer having a second conductivity type opposite to that of said single crystalline silicon substrate;
- and
- (c) an uppermost metal layer in contact with said intermediate polycrystalline silicon layer.
Dependencies are inferred from the claim text.