Receiver circuit
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsTsuyoshi Ebuchi, Toru Iwata, Takefumi Yoshikawa
Life of this patent
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Abstract
In a receiver circuit that receives data and clock signals through the cables, the number of transitions of a signal obtained based on the data or clock signal is detected by a frequency detection circuit, and when the number of transitions is not more than a predetermined set value, a signal for resetting the operation of a serial-parallel converter circuit included in a data processing unit is output, so as to control the output of received data. Thus, disconnection of the cable can be detected with low power consumption without providing a pull-up resistor and pull-down resistor and noise resistance can be improved.
Claims14
A receiver circuit for receiving a receive signal that undergoes a given number or more transitions in a given time, comprising:
- a processing unit for processing said receive signal;
- and
- a signal detection unit that accepts said receive signal, includes a transition number detection circuit for detecting a number of transitions of a signal obtained based on said receive signal and outputs a signal for controlling an operation of said processing unit when said number of transitions detected by said transition number detection circuit is not more than a set value.
A receiver circuit for receiving a receive signal that undergoes a given number or more transitions in a given time, comprising:
- a processing unit for processing said receive signal;
- and
- a signal detection unit that accepts said receive signal, includes an amplitude detection circuit for detecting amplitude of said receive signal and outputs a signal for controlling an operation of said processing unit when said amplitude detected by said amplitude detection circuit is not more than a set value.
Dependencies are inferred from the claim text.