Refresh controlling method and apparatus

A refresh controlling apparatus, by which given a plurality of bus master devices, a DRAM with n rows of memory cells is refreshed during a predetermined refresh period, the refresh controlling apparatus comprising:

• a count initialization value setting unit to set a count initialization value at an initial refresh interval or a changed refresh interval;
• a bus request signal generation unit to generate a bus request signal when the count initialization value is completely counted;
• a refresh signal generator to generate a refresh signal when a bus approval signal is generated by detection of a bus blank period, during which a bus request signal is not received from the bus master devices, or when a bus approval signal is generated in response to the bus request signal received from the bus request signal generation unit;
• and
• a bus blank determiner to determine whether the bus approval signal has been generated due to the bus blank period according to a logic signal received from the bus request signal generation unit, and to control the count initialization value setting unit, the bus request signal generation unit, and the refresh signal generator, upon determining that the bus approval signal has been generated due to the bus blank period.

A refresh controlling apparatus, in which given a plurality of bus master devices, a DRAM with n rows of memory cells is refreshed during a predetermined refresh period, the refresh controlling apparatus comprising:

• a first generating unit to generate a first refresh signal to refresh each of the memory cell rows of the DRAM at an initial refresh interval;
• a second generating unit to generate a second refresh signal, when a bus blank period during which a bus request signal is not received from the bus master devices, occurs before the initial refresh interval is completely lapsed, and a bus approval signal is accordingly applied;
• and
• a third generating unit to generate a third refresh signal to refresh a next memory cell row of the DRAM at a changed refresh interval, after a refresh event is executed in response to the second refresh signal.

A refresh controlling method, by which given a plurality of bus master devices, a DRAM with n rows of memory cells is refreshed during a predetermined refresh period, the refresh controlling method comprising:

• setting a count initialization value at an initial refresh interval or a changed refresh interval with a count initialization value setting unit;
• generating a bus request signal when the count initialization value is completely counted with a bus request signal generation unit;
• generating a refresh signal when a bus approval signal is generated by detection of a bus blank period, during which a bus request signal is not received from the bus master devices, or when a bus approval signal is generated in response to the bus request signal received from the bus request signal generation unit with a refresh signal generator;
• and
• determining whether the bus approval signal has been generated due to the bus blank period, according to a logic signal received from the bus request signal generation unit, and controlling the count initialization value setting unit, the bus request signal generation unit, and the refresh signal generator with a bus blank determiner, upon determining that the bus approval signal has been generated due to the bus blank period.