Writable tracking cells
AssigneeSanDisk Corporation
InventorsShahzad B. Khalid, Daniel C. Guterman, Geoffrey S. Gongwer, Richard Simko, Kevin M. Conley
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AssigneeSanDisk Corporation
InventorsShahzad B. Khalid, Daniel C. Guterman, Geoffrey S. Gongwer, Richard Simko, Kevin M. Conley
Estimating the term…
The present invention presents several techniques for using writable tracking cells. Multiple tracking cells are provided for each write block of the memory. These cells are re-programmed each time the user cells of the associated write block are written, preferably at the same time, using the same fixed, global reference levels to set the tracking and user cell programmed thresholds. The threshold voltages of the tracking cells are read every time the user cells are read, and these thresholds are used to determine the stored logic levels of the user cells. In one set of embodiments, populations of one or more tracking cells are associated with different logic levels of a multi-state memory. These tracking cell populations may be provided for only a subset of the logic levels. The read points for translating the threshold voltages are derived for all of the logic levels based upon this subset. In one embodiment, two populations each consisting of multiple tracking cells are associated with two logic levels of the multi-bit cell. In an analog implementation, the user cells are read directly using the analog threshold values of the tracking cell populations without their first being translated to digital values. A set of alternate embodiments provide for using different voltages and/or timing for the writing of tracking cells to provide less uncertainty in the tracking cells' final written thresholds.
A multi-state memory comprising:
A multi-state memory comprising:
A multi-state memory comprising:
A non-volatile memory comprising:
A method of operating a multi-state memory comprising:
A method of operating a multi-state memory comprising:
A method of operating a multi-state memory comprising:
A method of operating a non-volatile memory comprising:
An integrated circuit comprising:
A said sense amp for providing the analog voltage level of a non-volatile memory cell connected between said sense amp and ground, comprising:
Dependencies are inferred from the claim text.