[pixel structure and fabricating method thereof]

A pixel structure on a transparent substrate, the pixel structure comprising:

• a scan line over the transparent substrate;
• a gate insulation layer over the transparent substrate covering the scan line;
• a data line over the gate insulation layer, wherein the data line extends in a direction perpendicular to the direction of extension of the scan line;
• a shelling layer over the transparent substrate on each side of the data line;
• a dielectric layer between the data line and the gate insulation layer above the shelling layer;
• a thin film transistor over the transparent substrate, wherein the thin film transistor has a gate electrode, a channel layer and a pair of source/drain terminals, wherein the source terminal is electrically connected to the data line, the gate electrode is electrically connected to the scan line and the channel layer is formed over the gate insulation layer above the gate electrode;
• a passivation layer over the transparent substrate covering the thin film transistor and the data line;
• a contact within the passivation layer;
• and
• a pixel electrode over the transparent substrate, wherein the pixel electrode and the drain terminal are electrically connected through the contact.

A method of forming a pixel structure, comprising the steps of:

• forming a gate electrode and a scan line having connection with the gate electrode over a transparent substrate and forming a shelling layer over the transparent substrate at the same time, wherein the shelling layer is formed on each side of an area destined to form a data line and the shelling layers on each side are electrically connected together;
• forming a gate insulation layer over the transparent substrate covering the gate electrode, the scan line an the shelling layer;
• forming a channel layer over the gate insulation layer above the gate electrode;
• forming a pair of source/drain terminals over the channel layer and forming a data line having connection with the source terminal over the gate insulation layer at the same time, wherein the gate electrode, the channel layer and the source/drain terminals together constitute a thin film transistor;
• forming a passivation layer over the transparent substrate covering the thin film transistor and the data line;
• forming an opening that exposes the drain terminal in the passivation layer;
• and
• forming a pixel electrode over the passivation layer, wherein the pixel electrode and the drain terminal are electrically connected through a contact in the opening.

A method of forming a pixel structure, comprising the steps of:

• forming a gate electrode and a scan line having connection with the gate electrode over a transparent substrate and forming a shelling layer over the transparent substrate at the same time, wherein the shelling layer is formed on each side of an area destined to form a data line and the shelling layers on each side are electrically connected together;
• forming a gate insulation layer over the transparent substrate covering the gate electrode, the scan line and the shelling layer;
• forming a channel layer over the gate insulation layer above the gate electrode;
• forming a dielectric layer over the gate insulation layer above the shelling layer;
• forming a pair of source/drain terminals over the channel layer and forming a data line having connection with the source terminal over the gate insulation layer at the same time, wherein the gate electrode, the channel layer and the source/drain terminals together constitute a thin film transistor;
• forming a passivation layer over the transparent substrate covering the thin film transistor and the data line;
• forming an opening that exposes the drain terminal in the passivation layer;
• and
• forming a pixel electrode over the passivation layer, wherein the pixel electrode and the drain terminal are electrically connected through a contact in the opening.