Field memory having a line memory in a memory cell array

A field memory comprising:

• a first memory cell array having a plurality of bit lines and a plurality of memory cells each of which is connected to one of the bit lines, the memory cell array including a field memory for storing data and a line memory for temporally storing data;
• a first decoder connected to the field memory for selecting one of the memory cells in the field memory;
• a second decoder connected to the line memory for selecting one of the memory cells in the line memory;
• a first sense amplifier circuit connected to the first memory cell array;
• a first transfer gate circuit connected to the first sense amplifier circuit;
• a write register connected to the first transfer gate circuit for temporally storing data to be written in the memory cell array;
• and
• a first read register connected to the first transfer gate circuit for temporally storing data read from the memory cell array.

A field memory comprising:

• a field memory unit including,
• a plurality of bit lines,
• a plurality of first word lines disposed so as to intersect the bit lines, and
• a plurality of first memory cells provided at respective intersecting points of the bit lines and the first word lines and storing data corresponding to one screen;
• a line memory unit including,
• a plurality of second word lines disposed so as to intersect the bit lines, and
• a plurality of second memory cells provided at respective intersecting points of the bit lines and the second word lines and storing data corresponding to one line;
• a sense amplifier circuit for amplifying signals on the bit lines to a predetermined logical level;
• and
• a controller for selecting the corresponding first word line and reading data of the first memory cell corresponding to the selected word line onto the bit line, and selecting the corresponding second word line and writing the data on the bit line into the corresponding second memory cell.

A field memory comprising:

• a first memory block having a first field memory unit for storing data corresponding to one screen, and a line memory unit for storing data corresponding to one line;
• a second memory block having a second field memory unit for storing data corresponding to one screen;
• a register for holding data corresponding to one line outputted from the first or second field memory unit to a data line;
• and
• a controller for reading the data corresponding to one line from the first or second field memory unit and temporarily holding the same in the register, and thereafter writing the data retained in the register into the line memory unit.