Apparatus and method for facilitating memory data access with generic read/write patterns
AssigneeIntel Corporation
InventorsYen-Kuang Chen, Eric Debes, Matthew J. Holliman, Minerva M. Yeung
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AssigneeIntel Corporation
InventorsYen-Kuang Chen, Eric Debes, Matthew J. Holliman, Minerva M. Yeung
Estimating the term…
An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of a cache hit/cache miss of data requested by the load instruction within a re-tiling (RT) cache. When a cache miss is detected, a block of data is loaded into the RT cache according to the load instruction. This block of data will contain the data requested by the load instruction. Once loaded, a non-horizontally sequential access of the data requested by the load instruction is performed from the RT cache. Finally, the data accessed from the RT cache may be stored into a destination data storage device according to the load instruction.
A method comprising:
An apparatus, comprising:
A system, comprising:
A computer readable storage medium including program instructions that direct a computer to function in a specified manner when executed by a processor, the program instructions comprising:
Dependencies are inferred from the claim text.