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US 2004/0073748 A1Published application
Queued copy command
AssigneeIntel Corporation
InventorJohn C. Rudelic
Life of this patent
Estimating the term…
Abstract
A memory system including a programmable memory, such as a flash memory, may include a write buffer. A processor may generate and store a queue of commands to write a sequence of valid bytes in a reclaim operation. A controller in the memory system may perform the write commands in the write buffer without intervention by the processor.
Claims28
Apparatus comprising:
- a first memory block to store a plurality of sequential valid data blocks;
- a second memory block;
- a write buffer;
- a processor operative to generate a plurality of commands to write the plurality of sequential valid data blocks to the second memory block and to store said plurality of commands in the write buffer;
- and
- a controller to perform the commands in the write buffer.
3 more elements
A method comprising:
- generating a plurality of commands to write a plurality of sequential valid data blocks to a memory block in a memory system;
- storing the plurality of commands in a write buffer in the memory system;
- and
- performing a plurality of write operations in response to said plurality of commands.
1 more element
An article including a machine-readable medium including machine-executable instructions, the instructions operative to cause a machine to:
- generate a plurality of commands to write a plurality of sequential valid data blocks to a memory block in a memory system;
- store the plurality of commands in a write buffer in the memory system;
- and
- perform a plurality of write operations in response to said plurality of commands.
1 more element
A system comprising:
- a first memory system including
- a first memory block to store a plurality of sequential valid data blocks,
- a second memory block,
- a write buffer, and
- a controller to perform the commands in the write buffer;
- a second memory system to store a data block;
- and
- a processor to generate a plurality of commands to write the plurality of sequential valid data blocks to the second memory block and to store said plurality of commands in the write buffer and to transfer the plurality of data blocks in the second memory system to the first memory system.
5 more elements
Dependencies are inferred from the claim text.