Data transfer control device, electronic equipment, and data transfer control method

A data transfer control device for data transfer over a bus, the data transfer control device comprising:

• a buffer controller which controls access to a packet buffer in which is stored transfer data;
• an interface circuit which performs direct memory access (DMA) transfer between another bus that differs from the bus and the packet buffer;
• and
• a transfer controller which automatically transfers data to a host, when an IN token has been received from the host,
• wherein the transfer controller automatically transfers a short packet of zero data length to the host in response to the IN token from the host, when DMA transfer between the other bus and the packet buffer is complete and also the amount of data remaining to be transferred is zero.

A data transfer control method for data transfer through a bus, the method comprising:

• performing access control for a packet buffer in which transfer data is stored;
• setting the total size of transfer data and the maximum packet size in registers in a register section;
• automatically issuing a transaction with respect to one of end points and automatically transferring data to the end point while calculating the remaining size of data to be transferred, based on the total size of data and the maximum packet size;
• and
• automatically issuing the next transaction and automatically transferring a short packet to the endpoint, when the remaining size of transfer data in the current transaction is less than the maximum packet size.

A data transfer control method for data transfer through a bus, the method comprising:

• controlling access to a packet buffer in which transfer data is stored;
• performing direct memory access (DMA) transfer between another bus that differs from the bus and the packet buffer;
• automatically transferring data to a host, when an IN token has been received from the host;
• and
• automatically transferring a short packet of zero data length to the host in response to an IN token from the host, when DMA transfer between the other bus and the packet buffer is complete and also the amount of data remaining to be transferred is zero.