US 2004/0072406 A1 · Structure and process for a capacitor and other devices

Abstract

A structure and method of fabrication of a capacitor and other devices by providing a semiconductor structure and providing a top insulating layer and conductive features over the semiconductor structure; forming a first conductive layer over the top insulating layer; patterning the first conductive layer to form at least a capacitor bottom plate and a first portion of the first conductive layer; forming a capacitor dielectric layer over the top insulating layer and the capacitor bottom plate and the first portion of the first conductive layer; forming a second conductive layer over the capacitor dielectric layer; and patterning the second conductive layer to form at least a top plate over the bottom plate and a first section of the second conductive layer on the capacitor dielectric layer. The embodiment can further comprise conductive features in the top insulating layer that can underlie the bottom plate, the first portion or/and the first section. The first portion and the first section can form resistors, capacitors or other devices.

Claims43

Dependent claims

A method of fabrication of a capacitor in a semiconductor device;

comprising the steps of:
a) providing a semiconductor structure and providing a top insulating layer and conductive features over said semiconductor structure;
b) forming a first conductive layer over said top insulating layer;
c) patterning said first conductive layer to form at least a capacitor bottom plate and a first portion of said first conductive layer;
d) forming a capacitor dielectric layer over said top insulating layer, said capacitor bottom plate and said first portion of said first conductive layer;
e) forming a second conductive layer over said capacitor dielectric layer;
and
f) patterning said second conductive layer to form at least a top plate over said bottom plate and to form a first section of said second conductive layer on said capacitor dielectric layer.

5 more elements

A method of fabrication of a capacitor in a semiconductor device;

comprising the steps of:
a) providing a semiconductor structure and providing a top insulating layer and conductive features in said top insulating layer;
b) forming a top etch stop layer over said top insulating layer and said conductive features;
c) forming a first conductive layer over said top insulating layer;
d) patterning said first conductive layer to form at least a capacitor bottom plate and a first portion of said first conductive layer;
e) forming a capacitor dielectric layer over said top insulating layer and said capacitor bottom plate and a first portion of said first conductive layer;
(1) said first portion of said first conductive layer acts as a resistor;
f) forming a second conductive layer over said capacitor dielectric layer;
g) forming a cap etch stop layer on said second conductive layer;
h) patterning said second conductive layer and cap etch stop layer to form at least a top plate over said bottom plate and to form a first section of said second conductive layer on said capacitor dielectric layer over said top insulating layer;
i) forming an insulating layer over said top insulating layer;
j) forming interconnections to contact at least:
said first portion of said first conductive layer, said bottom plate, said top plate and said first section of said second conductive layer;
and said conductive features.

11 more elements

Dependencies are inferred from the claim text.

Structure and process for a capacitor and other devices

Life of this patent

Structure and process for a capacitor and other devices

Life of this patent

Abstract

Claims43