# US 2004/0072384 A1 · Infrared detector packaged with improved antireflection element

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- Number: US 2004/0072384 A1
- Document ID: US20040072384A1
- Status: Published application
- Kind: A1
- Application number: 10/628,849
- Filed: 2003-07-28
- Published: 2004-04-15
- Earliest claimed: 2000-12-29
- Assignees: Honeywell International Inc.
- Inventors: Barrett E. Cole
- Web page: https://patentgrep.com/patent/US20040072384A1

## CPC

- H10F 39/026: {Wafer-level processing}
- G01J 5/045: {Sealings; Vacuum enclosures; Encapsulated packages; Wafer bonding structures; Getter arrangements (getter arrangements per se H10W76/48, H10P36/03)}
- G01J 5/0875: Windows; Arrangements for fastening thereof
- H10F 39/184: {Infrared image sensors}
- H10F 39/804: {Containers or encapsulations}
- H10F 39/805: {Coatings}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- G01J: MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY (light sources F21, H01J, H01K, H05B; investigating properties of materials by optical means G01N)

## Abstract

An infrared detector has a window in a cover having a cavity for exposing detector pixels to incident radiation. The window has an antireflective element formed within the cavity as a field of posts. The field of post structures is formed in a cavity by etching the posts in a desired pattern first, and forming the cavity by a general etch over the whole field afterward.

## Claims

### Claim 1

A package cover having a cavity for receiving an infrared detector and a window area for transmitting infrared radiation to the detector, an interior surface of the window area within the cavity having a field of posts shaped and spaced so as to form an antireflection element for infrared radiation transmitted through the window area.

### Claim 2 (depends on 1)

The cover of claim 1 where the posts are upstanding from a ground level below the bottom surfce of the cavity.

### Claim 3 (depends on 2)

The cover of claim 2 where the tops of the posts are flush with the bottom surface of the cavity.

### Claim 4 (depends on 1)

The cover of claim 1 where the posts are holes depressed below the bottom surface of the cavity.

### Claim 5 (depends on 1)

The cover of claim 1 where the cover is a silicon wafer.

### Claim 6 (depends on 5)

The cover of claim 5 where the cavity is about 0-500 μm deep.

### Claim 7 (depends on 6)

The cover of claim 6 where the cavity is about 10-100 μm deep.

### Claim 8 (depends on 5)

The cover of claim 5 where the cavity is surrounded by a perimeter area.

### Claim 9 (depends on 1)

The cover of claim 1 where the posts form a pattern having two orthogonal directions of symmetry.

### Claim 10 (depends on 1)

The cover of claim 1 where the posts are square.

### Claim 11 (depends on 1)

The cover of claim 1 where the posts are right circular cylinders.

### Claim 12 (depends on 11)

The cover of claim 11 where the posts have a diameter in the approximate range of 1 μm to 10 μm.

### Claim 13 (depends on 12)

The cover of claim 12 where the posts have a spacing less than about 6 μm.

### Claim 14 (depends on 1)

The cover of claim 1 where the posts have non-vertical sidewalls.

### Claim 15 (depends on 14)

The cover of claim 14 where the posts are substantially pyramidal.

### Claim 16 (depends on 14)

The cover of claim 14 where the posts are substantially conical.

### Claim 17 (depends on 1)

The cover of claim 1 where the posts are between about 0.2 μm and about 4 μm high.

### Claim 18 (depends on 1)

The cover of claim 1 where the posts are equally spaced rows and columns.

### Claim 19 (depends on 18)

The cover of claim 18 where the rows and columns are spaced less than about 6 μm apart.

### Claim 20 (depends on 1)

The cover of claim 1 where an exterior surface of the cover has an antireflective coating in the window area.

### Claim 21 (depends on 20)

The cover of claim 20 where the antireflective layer comprises a further field of posts shaped and spaced so as to form an antireflection element.

### Claim 22

An infrared detector, comprising:
an array of pixels for producing an electrical signal in response to incident infrared radiation;
a substrate for holding the array;
a package cover having a window in a cavity for transmitting the radiation to the array;
a field of spaced posts for reducing reflections of the infrared radiation in the window.

### Claim 23 (depends on 22)

The detector of claim 22 further comprising a seal for joining a perimeter area of the cover to the substrate.

### Claim 24 (depends on 23)

The detector of claim 23 where the cavity is evacuated.

### Claim 25 (depends on 22)

The detector of claim 22 where the tops of the posts are substantially flush with a surface of the cavity.

### Claim 26 (depends on 22)

The detector of claim 22 where the bottoms of the posts lie below the level of a surface of the cavity.

### Claim 27 (depends on 22)

The detector of claim 22 where the array of pixels is a rectangular array of bolometers.

### Claim 28 (depends on 22)

The detector of claim 22 further comprising detection circuits for processing an image signal from the detector.

### Claim 29 (depends on 28)

The detector of claim 28 further comprising scanning circuits coupled to the detector.

### Claim 30 (depends on 28)

The detector of claim 28 further comprising a display coupled to the detection circuits.

### Claim 31 (depends on 30)

The detector of claim 30 further comprising scanning circuits coupled to both the detector and the display.

### Claim 32

A method for fabricating an infrared optical element from a wafer of material capable of transmitting infrared radiation therethrough, comprising, in the order listed:
masking a surface of the wafer with a pattern defining a cross section of a field of posts;
etching the wafer surface so as to form the field of posts to a desired depth;
masking the field of posts with a shape defining a cavity in the surface of the wafer;
etching the wafer surface including the field of posts so as to form a cavity in the wafer.

### Claim 33 (depends on 32)

The method of claim 32 where the second etching operation is performed such that the tops of the posts lie below the surface of the cavity.

### Claim 34 (depends on 32)

The method of claim 32 where the second etching operation is performed such that tops of the posts are approximately flush with a bottom surface of the cavity.

### Claim 35 (depends on 32)

The method of claim 32 where the second etching operation is performed such that bottoms of the posts lie below a bottom surface of the cavity.

### Claim 36 (depends on 32)

The method of claim 32 where the cross section of the posts varies along their height.

### Claim 37 (depends on 36)

The method of claim 36 where the cross section decreases along the height.

### Claim 38 (depends on 32)

The method of claim 32 where the first etching operation is a reactive ion etch.

### Claim 39 (depends on 38)

The method of claim 38 where the second etching operation is a reactive ion etch.

### Claim 40 (depends on 32)

The method of claim 32 where the height of the posts after the second etching operation is in the approximate range of 0.5 μm to 4 μm.

### Claim 41 (depends on 32)

The method of claim 32 further comprising applying an antireflection layer to a side of the wafer opposite the cavity.

### Claim 42 (depends on 32)

The method of claim 32 further comprising mounting an infrared detector to the wafer so as to receive incident infrared radiation through the wafer.

### Claim 43 (depends on 42)

The method of claim 42 where the infrared detector is an array of bolometer pixels.

### Claim 44 (depends on 42)

The method of claim 42 further comprising mounting the detector to the wafer.

### Claim 45 (depends on 44)

The method of claim 44 wherein the detector is hermetically sealed to the wafer.

### Claim 46 (depends on 44)

The method of claim 44 further comprising evacuating the cavity.

### Claim 47

A method for fabricating an infrared optical device, comprising:
masking a surface of a wafer of material capable of transmitting infrared radiation therethrough with a pattern defining a field of posts;
etching the wafer surface so as to form the field of posts to a desired height;
applying an antireflection element to the other surace of the wafer;
sealing the wafer to a substrate containing an array of bolometers.

### Claim 48 (depends on 47)

The method of claim 47 further comprising evacuating a space between the wafer and the substrate.

### Claim 49 (depends on 47)

The method of claim 47 where the posts have varying cross section along their height.

### Claim 50 (depends on 47)

The method of claim 47 further comprising:
performing the above operations for a plurality of infrared optical devices on the same wafer;
dicing the wafer after sealing it to the substrate containing multiple arrays of bolometrs;
therefater, dicing the wafer and the substrate to separate individual ones of the devices.