System and method of equalization of high speed signals

Abstract

In one aspect, the present invention is directed to a technique of, and system for enhancing the performance of high-speed digital communications through a communications channel, for example a backplane. In this aspect of the present invention, a transmitter includes equalization circuitry to compensate for bandwidth limitations and reflections in high-speed digital communication systems. In one embodiment, the equalization circuitry is designed, programmed and/or configured to introduce intersymbol interference in order to improve the signal integrity in high-speed communications and enhance the operation and performance of such systems. In this regard, the equalization circuitry includes temporally overlapping leading and/or trailing taps (relative to the data (symbol) signal) to reduce, minimize, mitigate or effectively eliminate pre-cursor and/or post-cursor intersymbol interference due to, for example, bandwidth limitations and reflections in high-speed digital communication systems. The amount of equalization may be programmed, adjusted or controlled by varying the positioning of the tap(s), varying the coefficients of the tap(s), and/or varying the pulse durations of the tap(s) (that is, the pulse duration of the equalization signal attributed to the tap).

Dependencies are inferred from the claim text.