Non-destructive readout
OwnerPer-Erik Nordal, Hans Gude Gudesen +1inventors
InventorsPer-Erik Nordal, Hans Gude Gudesen, Geirr L. Leistad
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OwnerPer-Erik Nordal, Hans Gude Gudesen +1inventors
InventorsPer-Erik Nordal, Hans Gude Gudesen, Geirr L. Leistad
Estimating the term…
In a method for determining the logic state of memory cells in a passive matrix-addressable data storage device with word and bit lines, components of current response are detected and correlated with a probing voltage, and a time-dependent potential is applied on selected word and bit lines or groups thereof, said potentials being mutually coordinated in magnitude and time such that the resulting voltages across all or some of the non-addressed cells at the crossing points between inactive word lines and active bit lines are brought to contain only negligible voltage components that are temporally correlated with the probing voltage. A first apparatus according to the invention for performing the method provides sequential readout of all memory cells on an active word line (AWL) by means of detection circuits (3; 4). An active word line (AWL) is selected by a multiplexer (7), while inactive word lines (IWL) are clamped to ground during readout. A second apparatus for performing the method is rather similar, but has only a single detection circuit (3, 4). An active word line (AWL) is selected by multiplexer (7) and a bit line (ABL) is selected by a multiplexer (9) provided between one end of the bit lines (BL) and the input of the detection circuit (3, 4), while inactive word and bit lines (IWL; IBL) are clamped to ground during readout.
A method for determining a logic state of selected memory cells provided in a passive matrix-addressable data storage device containing word and bit lines, wherein a specific logic state is assigned a unique logical value according to a predetermined protocol, wherein said cells store data in the form of an electrical polarization state in capacitor-like structures comprising a polarizable material, particularly a ferroelectric or electret material capable of exhibiting hysteresis, wherein said polarizable material is capable of maintaining a non-vanishing electrical polarization in the absence of an externally impressed voltage across said capacitor-like structures, wherein a selection of memory cells takes place by activating the word line or the bit line or both crossing at a memory cell in question, wherein the activation of a word line or a bit line is effected by externally applied potential differences therebetween, thus subjecting said selected cells to a small-signal probing voltage arising from the applied potential difference, whereby a current response is generated from said cells, wherein said small-signal probing voltage is time-dependent in an arbitrarily selectable fashion and has voltage amplitudes and/or durations less than those required for causing significant permanent change in the polarization states of said cells, wherein said logic state is determined by detecting components in said current response from said selected cell, wherein the components of the current response are temporarily correlated with said small-signal probing voltage or referencing signals derived from same, and wherein a decision on a logic state of a selected cell is performed on the basis of a comparison of said current response with a set of predefined criteria,
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