# US 2004/0070951 A1 · Semiconductor package assembly and method for electrically isolating modules

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- Number: US 2004/0070951 A1
- Document ID: US20040070951A1
- Status: Published application
- Kind: A1
- Application number: 10/631,342
- Filed: 2003-07-30
- Published: 2004-04-15
- Earliest claimed: 2001-11-07
- Assignees: Micron Technology, Inc.
- Inventors: Sion C. Quinlan; Tim J. Bales
- Web page: https://patentgrep.com/patent/US20040070951A1

## CPC

- H10W 44/601: {Capacitive arrangements (H10W44/20 takes precedence)}
- Y10S 257/924: with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
- Y10T 29/4913: Assembling to base an electrical component, e.g., capacitor, etc.
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.

## Claims

### Claim 1

An integrated circuit package assembly for electrically isolating modules, comprising:
a substrate having a first side and an opposing second side;
a first module attached to the first side of the substrate;
a second module attached to the first side of the substrate;
a first conductive surface proximate to the second side of the substrate, the first conductive surface conductively coupled to the first module; and
a second conductive surface spaced apart from the first conductive surface to form a capacitor with the first conductive surface, the second conductive surface being coupled to the second module.

### Claim 2 (depends on 1)

The package assembly of claim 1, further comprising a dielectric interposed between the first and second conductive surfaces.

### Claim 3 (depends on 1)

The package assembly of claim 1, further comprising an encapsulation substantially surrounding the package assembly.

### Claim 4 (depends on 3)

The package assembly of claim 3 wherein the package assembly is encased in a polymer.

### Claim 5 (depends on 3)

The package assembly of claim 3 wherein the package assembly is encased in ceramic.

### Claim 6 (depends on 3)

The package assembly of claim 3 wherein the package assembly is encased in a glass.

### Claim 7 (depends on 1)

The package assembly of claim 1 wherein the first module is an integrated circuit.

### Claim 8 (depends on 7)

The package assembly of claim 7 wherein the integrated circuit is a physical layer chip.

### Claim 9 (depends on 1)

The package assembly of claim 1 wherein the second module is an integrated circuit.

### Claim 10 (depends on 9)

The package assembly of claim 9 wherein the integrated circuit is a link layer chip.

### Claim 11 (depends on 1)

The package assembly of claim 1, further comprising a resistor having a first terminal coupled to the first conductive surface and further having a second terminal coupled to the second conductive surface.

### Claim 12 (depends on 10)

The package assembly of claim 10 wherein the resistor has a resistance of approximately one megohm.

### Claim 13 (depends on 11)

The package assembly of claim 11 wherein the resistor is a resistant film.

### Claim 14 (depends on 1)

The package assembly of claim 1, further comprising a first ground plane connected to the first conductive surface, and a second ground plane connected to the second conductive surface.

### Claim 15 (depends on 13)

The package assembly of claim 13 wherein the first ground plane comprises a ground wire of a cable bus.

### Claim 16 (depends on 13)

The package assembly of claim 13 wherein the second ground plane comprises a chassis of a computer.

### Claim 17

An integrated circuit package assembly for electrically isolating integrated circuits within a module, comprising:
a substrate having a first side and an opposing second side;
a module attached to the first side of the substrate, the module having a first and second integrated circuit;
a first conductive surface proximate to the second side of the substrate, the first conductive surface conductively coupled to the first integrated circuit; and
a second conductive surface spaced apart from the first conductive surface to form a capacitor with the first conductive surface, the second conductive surface being conductively coupled to the second integrated circuit.

### Claim 18 (depends on 16)

The package assembly of claim 16, further comprising a dielectric interposed between the first and second conductive surfaces.

### Claim 19 (depends on 16)

The package assembly of claim 16, further comprising an encapsulation substantially surrounding the package assembly.

### Claim 20 (depends on 18)

The package assembly of claim 18 wherein the package assembly is encased in a polymer.

### Claim 21 (depends on 18)

The package assembly of claim 18 wherein the package assembly is encased in ceramic.

### Claim 22 (depends on 18)

The package assembly of claim 18 wherein the package assembly is encased in a glass.

### Claim 23 (depends on 16)

The package assembly of claim 16 wherein the first module is an integrated circuit.

### Claim 24 (depends on 22)

The package assembly of claim 22 wherein the integrated circuit is a physical layer chip.

### Claim 25 (depends on 16)

The package assembly of claim 16 wherein the second module is an integrated circuit.

### Claim 26 (depends on 24)

The package assembly of claim 24 wherein the integrated circuit is a link layer chip.

### Claim 27 (depends on 16)

The package assembly of claim 16, further comprising a resistor having a first terminal coupled to the first conductive surface and further having a second terminal coupled to the second conductive surface.

### Claim 28 (depends on 26)

The package assembly of claim 26 wherein the resistor has a resistance of approximately one megohm.

### Claim 29 (depends on 27)

The package assembly of claim 27 wherein the resistor is a resistant film.

### Claim 30 (depends on 16)

The package assembly of claim 16, further comprising a first ground plane connected to the first conductive surface, and a second ground plane connected to the second conductive surface.

### Claim 31 (depends on 28)

The package assembly of claim 28 wherein the first ground plane comprises a ground wire of a cable bus.

### Claim 32 (depends on 28)

The package assembly of claim 28 wherein the second ground plane comprises a chassis of a computer.

### Claim 33

An integrated circuit package assembly for electrically isolating modules, comprising:
a first substrate with a first and opposing second side having a first module attached to the first side;
a first conductive surface proximate to the second side of the first substrate, the first conductive surface being conductively coupled to the first module;
a second substrate with a first and opposing second side having a second module attached to the first side; and
a second conductive surface proximate to the opposing side of the second substrate, the second conductive surface being conductively coupled to the second module and spaced apart from the first conductive surface to form a capacitor with the first conductive surface.

### Claim 34 (depends on 31)

The package assembly of claim 31, further comprising a dielectric interposed between the first and second conductive surfaces.

### Claim 35 (depends on 31)

The package assembly of claim 31, further comprising an encapsulation substantially surrounding the package assembly.

### Claim 36 (depends on 33)

The package assembly of claim 33 wherein the package assembly is encased in a polymer.

### Claim 37 (depends on 33)

The package assembly of claim 33 wherein the package assembly is encased in ceramic.

### Claim 38 (depends on 33)

The package assembly of claim 33 wherein the package assembly is encased in a glass.

### Claim 39 (depends on 31)

The package assembly of claim 31 wherein the first module is an integrated circuit.

### Claim 40 (depends on 37)

The package assembly of claim 37 wherein the integrated circuit is a physical layer chip.

### Claim 41 (depends on 31)

The package assembly of claim 31 wherein the second module is an integrated circuit.

### Claim 42 (depends on 39)

The package assembly of claim 39 wherein the integrated circuit is a link layer chip.

### Claim 43 (depends on 31)

The package assembly of claim 31, further comprising a resistor having a first terminal coupled to the first conductive surface and further having a second terminal coupled to the second conductive surface.

### Claim 44 (depends on 41)

The package assembly of claim 41 wherein the resistor has a resistance of approximately one megohm.

### Claim 45 (depends on 43)

The package assembly of claim 43 wherein the resistor is a resistant film.

### Claim 46 (depends on 31)

The package assembly of claim 31, further comprising a first ground plane connected to the first conductive surface, and a second ground plane connected to the second conductive surface.

### Claim 47 (depends on 43)

The package assembly of claim 43 wherein the first ground plane comprises a ground wire of a cable bus.

### Claim 48 (depends on 43)

The package assembly of claim 43 wherein the second ground plane comprises a chassis of a computer.

### Claim 49

An integrated circuit package assembly for electrically isolating integrated circuits within a module, comprising:
a substrate;
a first module having a first and opposing second side attached to the substrate on the first side;
a second module having a first and opposing second side attached to the substrate on the first side;
a non-conductive layer having a first and opposing second side, the first side proximate to the opposing second sides of the first and second modules;
a first conductive surface proximate to the second side of the first non-conductive layer, the first conductive surface conductively coupled to the first module; and
a second conductive surface spaced apart from the first conductive surface to form a capacitor with the first conductive surface, the second conductive surface being conductively coupled to the second module.

### Claim 50 (depends on 46)

The package assembly of claim 46, further comprising a dielectric interposed between the first and second conductive surfaces.

### Claim 51 (depends on 46)

The package assembly of claim 46, further comprising an encapsulation substantially surrounding the package assembly.

### Claim 52 (depends on 48)

The package assembly of claim 48 wherein the package assembly is encased in a polymer.

### Claim 53 (depends on 48)

The package assembly of claim 48 wherein the package assembly is encased in ceramic.

### Claim 54 (depends on 48)

The package assembly of claim 48 wherein the package assembly is encased in a glass.

### Claim 55 (depends on 46)

The package assembly of claim 46 wherein the first module is an integrated circuit.

### Claim 56 (depends on 52)

The package assembly of claim 52 wherein the integrated circuit is a physical layer chip.

### Claim 57 (depends on 46)

The package assembly of claim 46 wherein the second module is an integrated circuit.

### Claim 58 (depends on 54)

The package assembly of claim 54 wherein the integrated circuit is a link layer chip.

### Claim 59 (depends on 46)

The package assembly of claim 46, further comprising a resistor having a first terminal coupled to the first conductive surface and further having a second terminal coupled to the second conductive surface.

### Claim 60 (depends on 56)

The package assembly of claim 56 wherein the resistor has a resistance of approximately one megohm.

### Claim 61 (depends on 59)

The package assembly of claim 59 wherein the resistor is a resistant film.

### Claim 62 (depends on 46)

The package assembly of claim 46, further comprising a first ground plane connected to the first conductive surface, and a second ground plane connected to the second conductive surface.

### Claim 63 (depends on 58)

The package assembly of claim 58 wherein the first ground plane comprises a ground wire of a cable bus.

### Claim 64 (depends on 58)

The package assembly of claim 58 wherein the second ground plane comprises a chassis of a computer.

### Claim 65

An integrated circuit package assembly for electrically isolating modules, comprising:
a substrate having a first side and an opposing second side;
a first module having a first and opposing second side attached to the first side of the substrate on the first side of the first module;
a second module attached to the second side of the first module;
a first conductive surface proximate to the second side of the substrate, the first conductive surface conductively coupled to the first module; and
a second conductive surface spaced apart from the first conductive surface to form a capacitor with the first conductive surface, the second conductive surface being coupled to the second module.

### Claim 66 (depends on 61)

The package assembly of claim 61, further comprising a dielectric interposed between the first and second conductive surfaces.

### Claim 67 (depends on 61)

The package assembly of claim 61, further comprising an encapsulation substantially surrounding the package assembly.

### Claim 68 (depends on 63)

The package assembly of claim 63 wherein the package assembly is encased in a polymer.

### Claim 69 (depends on 63)

The package assembly of claim 63 wherein the package assembly is encased in ceramic.

### Claim 70 (depends on 63)

The package assembly of claim 63 wherein the package assembly is encased in a glass.

### Claim 71 (depends on 61)

The package assembly of claim 61 wherein the first module is an integrated circuit.

### Claim 72 (depends on 67)

The package assembly of claim 67 wherein the integrated circuit is a physical layer chip.

### Claim 73 (depends on 61)

The package assembly of claim 61 wherein the second module is an integrated circuit.

### Claim 74 (depends on 69)

The package assembly of claim 69 wherein the integrated circuit is a link layer chip.

### Claim 75 (depends on 61)

The package assembly of claim 61, further comprising a resistor having a first terminal coupled to the first conductive surface and further having a second terminal coupled to the second conductive surface.

### Claim 76 (depends on 71)

The package assembly of claim 71 wherein the resistor has a resistance of approximately one megohm.

### Claim 77 (depends on 75)

The package assembly of claim 75 wherein the resistor is a resistant film.

### Claim 78 (depends on 61)

The package assembly of claim 61, further comprising a first ground plane connected to the first conductive surface, and a second ground plane connected to the second conductive surface.

### Claim 79 (depends on 73)

The package assembly of claim 73 wherein the first ground plane comprises a ground wire of a cable bus.

### Claim 80 (depends on 73)

The package assembly of claim 73 wherein the second ground plane comprises a chassis of a computer.

### Claim 81

A method of electrically isolating modules within an integrated circuit package assembly, comprising:
attaching a first and second module to a substrate having a first and opposing second side;
providing a first conductive surface having a first and opposing second side abutting the opposing second side of the substrate;
providing a dielectric layer having a first and opposing second side abutting the opposing second side of the first conductive surface;
providing a second conductive surface abutting the opposing second side of the dielectric;
conductively coupling the first conductive surface to the first module; and
conductively coupling the second conductive surface to the second module.

### Claim 82 (depends on 76)

The method of claim 76, further comprising encasing the assembly in a polymer.

### Claim 83 (depends on 76)

The method of claim 76, further comprising encasing the assembly in a ceramic.

### Claim 84 (depends on 76)

The method of claim 76, further comprising encasing the assembly in glass.

### Claim 85

A method of electrically isolating modules within an integrated circuit package assembly, comprising:
forming a capacitor within the semiconductor package assembly, the capacitor having a first terminal and a second terminal;
coupling a first module to the first terminal of the capacitor; and
coupling a second module to the second terminal of the capacitor.

### Claim 86 (depends on 80)

The method of claim 80 wherein the capacitor is formed proximate to a second side of a substrate having a first and opposing second side upon which the modules are attached.

### Claim 87 (depends on 81)

The method of claim 81, wherein the modules are attached to the first side of the substrate and the capacitor is formed proximate to the second side of the substrate.

### Claim 88 (depends on 80)

The method of claim 80, wherein the modules have first and opposing second sides and are attached to a substrate on the first sides of the modules and the capacitor is formed proximate to the opposing second sides of the modules.

### Claim 89 (depends on 80)

The method of claim 80, wherein the capacitor is formed between a first module attached to a first substrate and a second module attached to a second substrate.