Synchronous buck and boost regulator power reduction circuit using high side sensing

A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

• an inductor, having a first port and a second port;
• a capacitor connected between the second port of the inductor and ground, the common connection node of the capacitor and the inductor providing an output voltage of the DC-DC switching regulator;
• a driver for driving pulses of current to the first port of the inductor when the high side pulsed signal is asserted;
• a switch and a diode connected in parallel between the first port of the inductor and ground;
• an undercurrent sense circuit adapted to sense a driving current flowing through the driver and to assert a disable signal when the driving current is less than a predetermined amount;
• and
• an enable/disable circuit adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.

A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

• an inductor, having a first port, and having a second port;
• a driver for driving pulses of current to the first port of the inductor when the high side pulsed signal is asserted;
• a capacitor having a first port, and having a second port connected to ground;
• a first switch and a diode connected in parallel between the first port of the inductor and ground;
• a second switch connected between the second port of the inductor and ground;
• a third switch connected between the common connection node of the second switch and the inductor, and the second node of the capacitor, a coupling node of the third switch and the capacitor providing an output voltage of the DC-DC switching regulator;
• an undercurrent sense circuit adapted to sense an operating current flowing through the driver and to assert a disable signal when the operating current is less than a predetermined amount;
• and
• an enable/disable circuit adapted to allow the low side pulsed signal to turn the first switch on when the disable signal is not asserted, and to not allow the low side pulsed signals to turn the first switch on when the disable signal is asserted.

A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

• an inductor, having a first port, and having a second port connected to ground;
• a driver for driving pulses of current to the first port of the inductor when the high side pulsed signal is asserted;
• a capacitor having a first port, and having a second port connected to ground;
• a switch and a diode connected in parallel between the first port of the inductor and the first port of the capacitor, a coupling node of the switch and the capacitor providing an output voltage of the DC-DC switching regulator;
• an undercurrent sense circuit adapted to sense an operating current flowing through the driver and to assert a disable signal when the operating current is less than a predetermined amount;
• and
• an enable/disable circuit adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.