Memory circuit, display circuit, and display device

A display circuit comprising:

• a liquid crystal display element having a structure that liquid crystal materials are held between a pair of electrodes;
• a memory circuit having a transistor whose gate is connected to input a data signal, and first and second storage capacitances which are charged to positive and negative power supply voltages and connected to a source and drain of said transistor to store the data signal as analog drive voltages of positive and negative polarities, respectively;
• and
• an output circuit which alternately applies the analog drive voltages of the positive and negative polarities held by said first and second storage capacitances to said liquid crystal display element.

A display device comprising:

• a plurality of pixels arrayed in a matrix of rows and columns;
• a plurality of scanning lines extending along the rows of said pixels;
• a plurality of signal lines extending along the columns of said pixels;
• and
• a plurality of pixel driving sections which are disposed near intersections of said scanning and signal lines, and each of which is controlled via one scanning line to capture a data signal on one signal line and output the data signal to one pixel, each pixel driving section including a memory circuit having a transistor whose gate is connected to the one signal line, and first and second storage capacitances which are charged to positive and negative power supply voltages and connected to a source and drain of said transistor to store the data signal as analog drive voltages of positive and negative polarities, respectively.