Substrate impedance measurement
AssigneeLSI Logic Corporation
InventorsAritharan Thurairajaratnam, Mohan R. Nagar
Life of this patent
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AssigneeLSI Logic Corporation
InventorsAritharan Thurairajaratnam, Mohan R. Nagar
Estimating the term…
A probe structure with a connector connecting the probe structure to a time domain reflectometry tester, where the connector has a signal conductor and a ground conductor. A back side layer is connected to the connector. A probe side layer with contacts is sandwiched with the back side layer in a layered substrate. The probe side layer has a centrally disposed signal contact and surrounding ground contacts. A conductive layer is disposed between the back side layer and the probe side layer. The conductive layer is connected to the ground conductor of the connector and to the ground contacts of the probe side layer contacts. A via extends from the back side layer to the probe side layer. The via is connected to the signal conductor of the connector, and is also connected to the centrally disposed signal contact of the probe side layer contacts. The via does not make connection with the conductive layer. A first of pins is connected to the signal contact, for making a connection with a structure to be tested on the package substrate. Others of the pins are connected to the ground contacts, for making connections with structures on the package substrate that surround the structure to be tested.
A probe structure for testing impedance of a package substrate using time domain reflectometry, the probe structure comprising:
A system for testing impedance of a package substrate using time domain reflectometry, the system comprising:
A system for testing impedance of a package substrate using time domain reflectometry, the system comprising:
Dependencies are inferred from the claim text.