Method for producing a semiconductor device and corresponding semiconductor device
AssigneeInfineon Technologies AG
InventorsHarry Hedler, Thorsten Meyer, Barbara Vasquez
Life of this patent
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Abstract
The present invention provides a method for producing a semiconductor device, with the steps of: applying an interconnect level (11, 12) to a semiconductor substrate (10); structuring the interconnect level (12); and applying a solder layer (13) on the structured interconnect level (11, 12) in such a way that the solder layer (13) assumes the structure of the interconnect level (11, 12). The present invention likewise provides such a semiconductor device.
Claims20
Method for producing a semiconductor device with the steps of:
- applying an interconnect level (11, 12) to a semiconductor substrate (10);
- structuring the interconnect level (11, 12);
- and
- applying a solder layer (13) on the structured interconnect level (11, 12) in such a way that the solder layer (13) assumes the structure of the interconnect level (11, 12).
Method according to one of the preceding claims, characterized in that the interconnect level (11, 12) is structured with the aid of a photolithographic process.
Method according to one of the preceding claims, characterized in that a carrier layer (11) which preferably comprises titanium and is structured like the interconnect level (12) is applied on the semiconductor substrate (10).
Method according to one of the preceding claims, characterized in that the solder layer (13) is applied in a printing process and is distributed in a predetermined way by re-liquefying or reflowing of the solder.
Method according to one of the preceding claims, characterized in that the solder layer (13) is applied in a dip soldering process, in which the upper side of the semiconductor substrate (10) provided with the structured interconnect level (11, 12) is dipped into a solder bath.
Method according to one of the preceding claims, characterized in that a solder resist layer is selectively applied on predetermined portions of the arrangement after the structuring of the interconnect level (11, 12) and before the application of the solder layer (13).
Method according to one of the preceding claims, characterized in that side walls (16) of the structured interconnect level (11, 12) and/or of the carrier layer (11) are wetted with solder.
Method according to one of the preceding claims, characterized in that both solder traces and solder balls (30) for the bonding of further semiconductor devices and/or a printed circuit board in the vertical direction are formed during the application of the solder layer (13), preferably in the same process step.
Method according to one of the preceding claims, characterized in that, after the application of the structured solder layer (13), a non-conductive plastic, preferably polymer, is applied in such a way that the tips of the solder balls (30) for the vertical bonding protrude from the plastic, other solder structures being covered over.
Method according to one of the preceding claims, characterized in that the conductive interconnect level (12) is formed on the semiconductor substrate (10) and/or contact devices such as bonding pads in a printing or stamping process with a highly reactive substance, which comprises at least one noble metal, such as preferably platinum or palladium.
Semiconductor device with:
- a semiconductor substrate (10);
- a structured interconnect level (11, 12) on the semiconductor substrate (10);
- and
- a solder layer (13) on the structured interconnect level (11, 12) for enlarging the conductive cross section, the solder layer (13) assuming the structure of the interconnect level (11, 12).
Dependencies are inferred from the claim text.