Low cost, high performance flip chip package structure

A method for manufacturing an integrated circuit chip package, comprising

• providing a substrate having a circuit side and a dielectric side, the substrate comprising an electrically insulating layer and a patterned electrically conductive layer, the substrate further including vias through the insulating layer opening on an exposed surface of the insulating layer;
• affixing a semiconductor die onto the circuit side of the substrate and forming a flip chip interconnection;
• filling the vias with an electrically conductive material;
• applying an electrically conductive layer onto the exposed surface of the electrically insulating material, the electrically conductive layer covering at least a portion of the dielectric side of the substrate;
• and
• curing the electrically insulating material.

A method for manufacturing an integrated circuit chip package, comprising

• providing a substrate including a dielectric layer having first and second surfaces and a patterned electrically conductive film on the first surface, the side of the substrate having the patterned conductive film being a circuit side of the substrate, and the side of the substrate having the second surface being a dielectric side of the substrate, the substrate having vias through the dielectric layer opening on the second surface;
• affixing a semiconductor die onto the circuit side of the substrate and forming a flip chip interconnection;
• applying an electrically conductive material onto the dielectric side of the substrate, filling the vias and covering at least a portion of the dielectric side of the substrate;
• and
• curing the electrically conductive material.

A method for manufacturing an integrated circuit chip package, comprising

• providing a substrate including a dielectric layer having first and second surfaces, and having an electrically insulating adhesive layer on the second surface and a patterned electrically conductive layer on the first surface, the side of the substrate having the patterned conductive layer being a “circuit side” of the substrate, and the side of the substrate having the electrically insulating adhesive layer being the “dielectric side” of the substrate, the substrate having vias through the insulating layer and the dielectric layer opening on the exposed surface of the insulating layer;
• affixing a semiconductor die onto the circuit side of the substrate and forming a flip chip interconnection;
• filling the vias with an electrically conductive material;
• applying an electrically conductive layer onto the exposed surface of the electrically insulating material, the electrically conductive layer making electrical contact with the electrically conductive material in the vias, and thereby with selected traces in the patterned electrically conductive layer, and covering at least a portion of the dielectric side of the substrate;
• and
• curing the electrically insulating material.