Mounting spring elements on semiconductor devices, and wafer-level testing methodology

Method of testing and mounting semiconductor dies, comprising:

• prior to a plurality of semiconductor dies being singulated from a semiconductor wafer:
• mounting a plurality of resilient contact structures directly to a plurality of terminals on a surface of at least one of the plurality of semiconductor dies, said resilient contact structures each having a tip and extending from the surface of the die;
• urging a substrate having a plurality of terminals towards the surface of the die to effect a plurality of pressure connections between respective terminals and tips of the resilient contact structures;
• and
• providing signals to the terminals of the substrate to test the semiconductor die;
• after testing the semiconductor die:
• singulating the die from the wafer;
• and
• mounting the die to an electronic component, connections being made between the resilient contact structures of the die and terminals of the electronic component.

Method of mounting resilient contact structures directly to semiconductor devices, comprising:

• providing an insulating layer over a patterned metal layer on a surface of a semiconductor die;
• providing a plurality of openings in the insulating layer;
• providing a blanket conductive layer atop the insulating layer;
• providing a patterned layer of masking material over the blanket conductive layer, said patterned layer of masking material having a plurality of openings aligned with the plurality of openings in the insulating layer;
• bonding a wire to the blanket conductive layer within each of at least a portion of the openings in the patterned layer of masking material;
• causing each bonded wire to extend from the surface of the semiconductor die;
• severing each bonded wire at a distance from the surface of the semiconductor die;
• and
• overcoating each severed wire and exposed portions of the blanket conductive layer.

Method of performing testing selected from the group consisting of test and burn-in on a semiconductor device, comprising:

• mounting resilient contact structures directly to a semiconductor device;
• urging the semiconductor device against a test board, said test board having contact areas, so that tips of the resilient contact structures are electrically connected to the contact areas on the test board;
• performing testing on the semiconductor device;
• subsequently mounting the semiconductor device to a system board, said system board having contact areas, so that the tips of the resilient contact structures are electrically connected to the contact areas on the system board.

Method of temporarily connecting to a semiconductor device prior to permanently connecting to the semiconductor device, comprising:

• mounting a plurality of electrical contact structures to a bare semiconductor device;
• urging the semiconductor device against a first electronic component to effect a temporary connection between the semiconductor device and the first electronic component, with the electrical contact structures serving as an electrical interconnect between the semiconductor device and the first electronic component;
• and
• using the same electrical contact structures mounted to the semiconductor device to effect a permanent connection between the semiconductor device and a second electronic component.

Method of making a temporary connection between a first electronic component and a second electronic component, and subsequently making a permanent connection between the first electronic component and a third electronic component, comprising:

• mounting a plurality of resilient contact structures to a surface of the first electronic component;
• urging the first electronic component against the second electronic component to effect a temporary connection between the first electronic component and the second electronic component;
• removing the second electronic component;
• and
• mounting the first electronic component to the third electronic component.

Method of pre-fabricating tip structures for ends of contact structures extending from semiconductor dies, comprising:

• depositing at least one layer of at least one conductive material on a surface of a silicon wafer;
• depositing a layer of masking material atop the at least one conductive layer;
• patterning openings in the masking material;
• depositing at least one layer of at least one conductive material into the openings;
• and
• removing the masking material.

Method of exercising (test and/or burn-in) semiconductor devices, comprising:

• fabricating a plurality of composite interconnection elements on a plurality of unsingulated semiconductor dies on a semiconductor wafer;
• exercising at least a portion of the unsingulated semiconductor dies;
• and
• singulating the semiconductor dies from the semiconductor wafer.

Method of exercising (test and/or burn-in) semiconductor devices, comprising:

• mounting a plurality of resilient contact structures on a plurality of unsingulated semiconductor dies on a semiconductor wafer;
• exercising at least a portion of the unsingulated semiconductor dies;
• and
• singulating the semiconductor dies from the semiconductor wafer.

Method of burning-in semiconductor devices, comprising:

• mounting a plurality of resilient contact structures on a plurality of unsingulated semiconductor dies on a semiconductor wafer;
• powering up at least a portion of the unsingulated semiconductor dies by making pressure connections to the resilient contact structures on the portion of the unsingulated semiconductor dies;
• and
• heating the semiconductor devices to a temperature of at least 150° C. for less than 60 minutes.

A burn-in apparatus for burning-in semiconductor devices, comprising:

• a semiconductor wafer comprising a plurality of unsingulated semiconductor devices on the wafer, each said semiconductor device comprising a plurality of resilient contact structures mounted thereon;
• a test board comprising a plurality of contact elements, said test board disposed in proximity to said semiconductor wafer, forming pressure connections between ones of said resilient contact structures and corresponding contact elements of said test board;
• and
• means for elevating a temperature of said semiconductor devices for a period of time.