Voltage generation circuitry having temperature compensation
AssigneeSanDisk Corporation
InventorsYongliang Wang, Raul A. Cernea, Chi-Ming Wang
Life of this patent
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Abstract
Techniques for producing and utilizing temperature compensated voltages to accurately read signals (e.g., voltages) representing data stored in memory cells of a memory system are disclosed. The memory system is, for example, a memory card. The magnitude of the temperature compensation can be varied or controlled in accordance with a temperature coefficient. These techniques are particularly well suited for used with memory cells that provide multiple levels of storage.
Claims20
A memory apparatus, said memory apparatus comprising:
- a plurality of memory cells, each of said memory cells having multi-state data storage transistor devices, and said multi-state data storage transistor devices having a temperature dependency;
- and
- a voltage generation circuit operatively connected with said memory cells, said voltage generation circuit produces a plurality of different voltage levels, each of the different voltage levels produced by said voltage generation circuit having a temperature dependency that substantially offsets the temperature dependency of said multi-state data storage transistor devices.
A voltage generation circuit for generating gate control voltages to be supplied to control gates of multi-state data storage transistor devices, said voltage generation circuit comprising:
- a first current generator for producing a first current that is substantially independent of temperature;
- a second current generator for producing a second current that is dependent on temperature;
- and
- a resistor ladder having a plurality of resistors connected in series, with nodes between adjacent pairs of the resistors,
- wherein the first current is supplied to a first end of said resistor ladder, and the second current is supplied to one of the nodes of said resistor ladder.
A memory apparatus, said memory apparatus comprising:
- a plurality of memory cells, each of said memory cells having multi-state data storage transistor devices, and said multi-state data storage transistor devices having a temperature dependency;
- and
- means for generating a plurality of different voltage levels, each of the different voltage levels produced by said voltage generation circuit having a temperature dependency that counteracts the temperature dependency of said multi-state data storage transistor devices.
Dependencies are inferred from the claim text.