Nonvolatile semiconductor memory capable of generating read-mode reference current and verify-mode reference current from the same reference cell

A nonvolatile semiconductor memory comprising:

• a plurality of nonvolatile memory cells each having a gate, a drain and a source to hold a multilevel of three or more levels corresponding to a threshold voltage level;
• a plurality of word lines connected to gates of the nonvolatile memory cells, respectively;
• a plurality of bit lines connected to drains of the nonvolatile memory cells, respectively;
• a plurality of source lines connected to sources of the nonvolatile memory cells, respectively;
• a reference current generation circuit which generates at least first and second reference currents, the reference current generation circuit including at least a first reference cell, a second reference cell having a threshold voltage that is higher than that of the first reference cell, a first amplification circuit which amplifies a current flowing through the first reference cell, and a second amplification circuit which amplifies a current flowing through the second reference cell, a first current amplification ratio of an amplification factor of current in program verify mode to an amplification factor of current in a data read mode in the first amplification circuit being larger than 1, a second current amplification ratio of an amplification factor of current in a program verify mode to an amplification factor of current in a data read mode in the second amplification circuit being larger than 1, and the first current amplification ratio being smaller than the second current amplification ratio;
• a first sense amplifier which compares the first reference current with a current flowing through a selected one of the nonvolatile memory cells and reads a signal corresponding to a multilevel held in the selected one of the nonvolatile memory cells;
• and
• a second sense amplifier which compares the second reference current with a current flowing through a selected one of the nonvolatile memory cells and reads a signal corresponding to a multilevel held in the selected one of the nonvolatile memory cells.

A nonvolatile semiconductor memory comprising:

• a plurality of nonvolatile memory cells each having a gate, a drain and a source to hold a multilevel of three or more levels corresponding to a threshold voltage level;
• a plurality of word lines connected to gates of the nonvolatile memory cells, respectively;
• a plurality of bit lines connected to drains of the nonvolatile memory cells, respectively;
• a plurality of source lines connected to sources of the nonvolatile memory cells, respectively;
• a reference current generation circuit which selectively generates at least first and second reference currents, the reference current generation circuit including at least a first reference cell, a second reference cell having a threshold voltage that is higher than that of the first reference cell, a first amplification circuit which amplifies a current flowing through the first reference cell, and a second amplification circuit which amplifies a current flowing through the second reference cell, a first current amplification ratio of an amplification factor of current in program verify mode to an amplification factor of current in a data read mode in the first amplification circuit is larger than 1, a second current amplification ratio of an amplification factor of current in a program verify mode to an amplification factor of current in a data read mode in the second amplification circuit is larger than 1, and the first current amplification ratio is smaller than the second current amplification ratio;
• and
• a sense amplifier which compares an output current of the reference current generation circuit and a cell current flowing through a selected one of the nonvolatile memory cells and amplifies and outputs the cell current.

A nonvolatile semiconductor memory comprising:

• a plurality of nonvolatile memory cells each having a gate, a drain and a source to hold a multilevel of three or more levels corresponding to a threshold voltage level;
• a plurality of word lines connected to gates of the nonvolatile memory cells, respectively;
• a plurality of bit lines connected to drains of the nonvolatile memory cells, respectively;
• a plurality of source lines connected to sources of the nonvolatile memory cells, respectively;
• a reference current generation circuit which selectively generates at least first and second reference currents, the reference current generation circuit including at least a first reference cell, a second reference cell having a threshold voltage that is higher than that of the first reference cell, a first amplification circuit which amplifies a current flowing through the first reference cell, and a second amplification circuit which amplifies a current flowing through the second reference cell, a first current amplification ratio of an amplification factor of current in program verify mode to an amplification factor of current in a data read mode in the first amplification circuit being larger than 1, a second current amplification ratio of an amplification factor of current in a program verify mode to an amplification factor of current in a data read mode in the second amplification circuit being larger than 1, and the first current amplification ratio is smaller than the second current amplification ratio, the reference current generation circuit further including a third reference cell having a threshold voltage which is higher than that of the second reference cell in order to generate a third reference current, and a third amplification circuit which amplifies a current flowing through the third reference cell;
• and
• a sense amplifier which compares an output current of the reference current generation circuit and a cell current flowing through a selected one of the nonvolatile memory cells and amplifies and outputs the cell current,
• wherein the reference current generation circuit selectively outputs the second and third reference currents in accordance with logic of an output of the sense amplifier when the output current of the reference current generation circuit is the first reference current.

A nonvolatile semiconductor memory comprising:

• a plurality of memory cells each having 2N (N is two or more) levels;
• a plurality of word lines connected to gates of the memory cells, respectively;
• a plurality of bit lines connected to drains of the memory cells, respectively;
• a plurality of source lines connected to sources of the memory cells, respectively;
• a reference current generation circuit which selectively outputs one of (N−1) reference currents, the reference current generation circuit including (N−1) reference cells and (N−1) amplification circuits which amplify a current flowing through the (N−1) reference cells, a threshold voltage of a first reference cell of the (N−1) reference cells being higher than that of a (I−1)-th reference cell (1≦I≦N), a ratio of an I-th amplification factor of current in program verify mode to an amplification factor of current in a data read mode in an I-th amplification circuit of the (N−1) amplification circuits being larger than 1, and a (I−1)-th amplification factor being smaller than the I-th amplification factor;
• and
• a sense amplifier which compares an output current of the reference current generation circuit and a cell current flowing through a selected one of the memory cells and amplifies and outputs the cell current,
• wherein the reference current generation circuit selectively outputs the second and third reference currents in accordance with logic of an output of the sense amplifier when the output current of the reference current generation circuit is the first reference current.

A nonvolatile semiconductor memory comprising:

• a plurality of memory cells each having 2N (N is two or more) levels;
• a plurality of word lines connected to gates of the memory cells, respectively;
• a plurality of bit lines connected to drains of the memory cells, respectively;
• a plurality of source lines connected to sources of the memory cells, respectively;
• a reference current generation circuit which selectively outputs one of (N−1) reference currents, the reference current generation circuit including (N−1) reference cells and (N−1) amplification circuits which amplify a current flowing through the (N−1) reference cells, a threshold voltage of a first reference cell of the (N−1) reference cells being higher than that of a (I−1)-th reference cell (1≦I≦N), a ratio of an I-th amplification factor of current in program verify mode to an amplification factor of current in a data read mode in an I-th amplification circuit of the (N−1) amplification circuits being larger than 1, and a (I−1)-th amplification factor being smaller than the I-th amplification factor;
• and
• a sense amplifier which compares an output current of the reference current generation circuit and a cell current flowing through a selected one of the memory cells and amplifies and outputs the cell current,
• wherein the reference current generation circuit selectively outputs the second and third reference currents in accordance with logic of an output of the sense amplifier when the output current of the reference current generation circuit is the first reference current.