Ferroelectric memory with wide operating voltage and multi-bit storage per cell
AssigneeTexas Instruments Incorporated
InventorsJohn Anthony Rodriguez, K. R. Udayakumar
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Abstract
Apparatus and methods are described for a multi-level FeRAM memory device. Using write and read circuits associated with the memory device, multiple data states may be written to and read from the ferroelectric memory device which are associated with a single polarization direction, thereby allowing for a single cell to contain more than one bit of data.
Claims28
A ferroelectric memory device, comprising:
- a ferroelectric memory cell;
- and
- a program circuit operable to selectively program the ferroelectric memory cell to one of a plurality of differing polarization charge density levels in one polarization direction.
A ferroelectric memory device, comprising:
- a ferroelectric memory cell;
- and
- a program circuit operable to selectively program the ferroelectric memory cell to at least three differing polarization charge density levels.
A ferroelectric memory device, comprising:
- a ferroelectric memory cell operably selectively coupled to one of a first and second data bit line during a memory operation, the ferroelectric memory cell comprising:
- a ferroelectric capacitor having a first terminal coupled to a plate line;
- and
- an access transistor operable to couple a second terminal of the ferroelectric capacitor to one of the data bit lines during the memory operation;
- a program voltage generator selectively coupled or directly coupled to the access transistor through the one of the first and second data bit lines associated with the memory cell, the generator operable to produce one of a plurality of voltage levels for use as a program voltage during a write memory operation during a read memory operation;
- and
- wherein during the write memory operation, the program voltage generator couples to the one of the data bit lines which is coupled to the ferroelectric memory cell and programs the ferroelectric memory cell with the program voltage to one of a plurality of data states, wherein the data states are associated with one of a plurality of polarization charge densities in one polarization direction.
A method of programming a ferroelectric memory cell, comprising:
- generating a first program voltage;
- applying the first program voltage to the ferroelectric memory cell to bias the memory cell in a first polarization direction, the first program voltage generating a first polarization charge density associated with the memory cell;
- generating a second program voltage;
- and
- applying the second program voltage to the ferroelectric memory cell to bias the memory in the first polarization direction, the second program voltage generating a second polarization charge density associated with the memory cell, wherein the first and second polarization charge densities are different.
A method of writing a data state into a ferroelectric memory cell, wherein the data state corresponds to one of a plurality of polarization charge density levels, the method comprising:
- coupling a program voltage circuit operable to generate a plurality of program voltages associated with a single polarization direction to the ferroelectric memory cell to be programmed;
- and
- charging the memory cell to one of the plurality of polarization charge density levels associated with the one polarization direction with a program voltage from the program voltage circuit.
A method of reading data associated with a programmed multi-bit ferroelectric memory device, comprising:
- ascertaining a voltage associated with a polarization charge density of the programmed multi-bit ferroelectric memory device;
- and
- determining a state of the programmed multi-bit ferroelectric memory device based on a magnitude of a difference between the voltage associated with the polarization charge density and a reference voltage.
A method of sensing one of a plurality of data states from a ferroelectric memory cell, wherein the data state corresponds to one of a plurality of polarization charge density levels, the method comprising:
- coupling a multi-level sense amplifier circuit to first and second bit lines associated with the ferroelectric memory cell;
- coupling the ferroelectric memory cell to the first bit line and a reference voltage to the second bit line;
- sensing a voltage associated with a polarization charge density of the ferroelectric memory cell and the reference voltage with the multi-level sense amplifier circuit;
- and
- determining a data state from the plurality of available data states based on a magnitude of a difference between the voltage associated with the polarization charge density and the reference voltage.
Dependencies are inferred from the claim text.