Integrated optical chip
AssigneeCorning Incorporated
InventorsFederico Caccavale, Luigi Gobbi, Marco Marazzi, Gloria Obetti
Life of this patent
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Abstract
An integrated optical chip has a crystalline structure cut along parallel principal crystallographic planes and a thickness of less than 1.0 mm. An optical signal pathway is disposed generally longitudinally in one of the cut surfaces of the chip, and the chip is attached to a substrate material up to 1.0 mm thick and having similar coefficients of thermal expansion in that principal crystallographic plane. A grounding plane is disposed between the chip and substrate to provide an electrically conductive path between opposite lateral surfaces of the chip. A method of making the chip is also described.
Claims22
Integrated optical chip having a crystalline structure cut along parallel principal crystallographic planes and a thickness of less than 1.0 mm, an optical signal pathway being disposed generally longitudinally in one of the cut surfaces of the chip, wherein the chip is attached to a substrate material having similar coefficients of thermal expansion in the said principal crystallographic plane, characterised by a grounding plane disposed between the chip and substrate providing an electrically conductive path between opposite lateral surfaces of the chip, and the thickness of the substrate material being up to 1.0 mm.
Method of manufacturing an integrated optical chip, the chip having a crystalline structure cut along parallel principal crystallographic planes and a thickness of less than 1.0 mm, an optical signal pathway being disposed in one of the cut surfaces of the chip, the method comprising the steps of:
- (i) forming at least one optical signal pathway in a first surface of a crystalline wafer cut along parallel principal crystallographic planes to a thickness less than 1 mm;
- (ii) applying an electrically conductive layer to a second surface of the crystalline wafer opposite to that of the optical signal pathway;
- (iii) attaching a substrate material slab to the said conductive layer on the said crystalline wafer, said slab having a thickness up to 1.0 mm and similar coefficients of thermal expansion to the said wafer in the said principal crystallographic plane;
- (iv) dicing a composite chip on substrate from the wafer-slab structure, the said composite chip comprising a substrate and at least one optical signal pathway extending generally longitudinally with respect to the composite chip;
- and
- (v) applying an electrically conductive path to lateral surfaces of the said composite chip.
Dependencies are inferred from the claim text.