Interface circuitry for display chip
OwnerSterling Smithinventor
Life of this patent
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Abstract
An interface circuitry of a display chip is disclosed. According to the present invention, the interface circuitry comprises an input node, a filter and a clamping circuit. The input node is used for receiving an analog image signal. The filter is utilized for processing the analog image signal and providing a processed image signal at an internal node. The clamping circuit is connected between the internal node and a reference level. The clamping circuit is used to clamp the processed image signal by the reference level during a clamping interval.
Claims12
An interface circuitry of a display chip, said interface circuitry comprising:
- an input node for receiving an analog image signal;
- a filter for processing said analog image signal and providing a processed image signal at an internal node;
- and
- a clamping circuit connected between said internal node and a reference level;
- wherein said clamping circuit is used to clamp said processed image signal by said reference level during a clamping interval.
An interface circuitry of a display chip, said interface circuitry comprising:
- an input node for receiving an analog image signal;
- a filter for processing said analog image signal and providing a processed image signal at an internal node;
- an ADC unit for converting said processed image signal into a digital image signal;
- and
- a clamping circuit connected between said internal node and a reference level;
- wherein said clamping circuit is used to clamp said processed image signal by said reference level during a clamping interval.
Dependencies are inferred from the claim text.