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US 2004/0024980 A1Published application
Memory access control system, apparatus, and method
AssigneeIntel Corporation
InventorsGreg E. Scott, Jenny M. Pelner
Life of this patent
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Abstract
Articles, methods, apparatus, and systems to control access to a protected area of a memory are disclosed.
Claims25
An article comprising a machine-accessible medium having associated data, wherein the data, when accessed, results in a machine performing:
- detecting an attempted write operation to a protected area of a memory including a first set of instructions;
- using a second set of instructions not located in the memory to determine that an authorization flag not located in the memory has been set by the first set of instructions;
- and
- if the authorization flag has been set, enabling the attempted write operation.
1 more element
An apparatus, comprising:
- a first memory having a protected area including a first set of instructions to set a state of a flag and to write to the protected area, the first memory including an access enabling line;
- a write detection module having an output coupled to an interrupt to indicate an attempt to write to the protected area;
- and
- a second memory including a second set of instructions in operational communication with the interrupt, the second set of instructions adapted to determine the state of the flag.
1 more element
An apparatus, comprising:
- a network interface;
- and a memory access control circuit operationally connected to the network interface, the memory access control circuit including a first memory having a protected area including a first set of instructions to set a state of a flag and to write to the protected area, the first memory including an access enabling line, a write detection module having an output coupled to an interrupt to indicate an attempt to write to the protected area, and a second memory including a second set of instructions in operational communication with the interrupt, the second set of instructions adapted to determine the state of the flag.
A system, comprising:
- a server;
- and
- an apparatus capable of being coupled to the server, the apparatus including a first memory having a protected area including a first set of instructions to set a state of a flag and to write to the protected area, the first memory including an access enabling line, a write detection module having an output to indicate an attempt to write to the protected area, and a second memory including a second set of instructions in operational communication with the write detection module, the second set of instructions, upon execution, capable of determining the state of the flag.
Dependencies are inferred from the claim text.