Method and apparatus for write cache flush and fill mechanisms

A method, comprising:

• receiving a plurality of write requests and storing the plurality of write requests in a plurality of cache lines in a write cache storage;
• selecting a first one of the plurality of cache lines for dispatching to a memory, wherein the first one of the plurality of cache lines has a first address;
• determining if a second one of the plurality of cache lines has a second address within a predetermined range of the first address;
• dispatching the first and second ones of the plurality of cache lines to the memory if the second address is within the predetermined range of the first address;
• and
• dispatching the first one but not the second one of the plurality of cache lines to the memory if the second address is not within the predetermined range of the first address.

A machine-readable medium having stored thereon instructions, which when executed by a processor cause said processor to perform:

• receiving a plurality of write requests and storing the plurality of write requests in a plurality of cache lines in a write cache storage;
• selecting a first one of the plurality of cache lines for dispatching to a memory, wherein the first one of the plurality of cache lines has a first address;
• determining if a second one of the plurality of cache lines has a second address within a predetermined range of the first address;
• dispatching the first and second ones of the plurality of cache lines to the memory if the first address is within the predetermined range of the second address;
• and
• dispatching the first one but not the second one of the plurality of cache lines to the memory if the second address is not within the predetermined range of the first address.

An apparatus, comprising:

• write cache storage to store cache lines of write data;
• a flush dispatcher coupled to the write cache storage to dispatch the cache lines to memory;
• control logic to:
• dispatch at least one of the cache lines to memory if the number of cache lines in the write cache storage exceeds a first predetermined value;
• and
• not dispatch any of the cache lines to memory if the number of cache lines in the write cache storage does not exceed the first predetermined value.

A method, comprising:

• storing write requests in cache lines of write data in write cache storage;
• dispatching at least one of the cache lines to memory if the number of cache lines in the write cache storage exceeds a first predetermined value;
• and
• not dispatching any of the cache lines to memory if the number of cache lines in the write cache storage does not exceed the first predetermined value.

A machine-readable medium having stored thereon instructions, which when executed by a processor cause said processor to perform:

• storing write requests in cache lines of write data in write cache storage;
• dispatching at least one of the cache lines to memory if the number of cache lines in the write cache storage exceeds a first predetermined value;
• and
• not dispatching any of the cache lines to memory if the number of cache lines in the write cache storage does not exceed the first predetermined value.

An apparatus, comprising:

• write cache storage to receive a plurality of partial write requests for merging into associated cache lines of write data;
• a flush dispatcher coupled to the write cache storage to dispatch the cache lines to memory;
• control logic to:
• determine if a first cache line associated with a first of the plurality of partial write requests is stored in the write cache storage;
• if the first cache line is not stored in the write cache storage:
• retrieve the first cache line from memory;
• store the retrieved first cache line in the write cache storage;
• and
• merge the first of the plurality of partial write requests into the retrieved first cache line.

A method, comprising:

• receiving a plurality of partial write requests for merging into associated cache lines of write data in write cache storage;
• determining if a first cache line associated with a first of the plurality of partial write requests is stored in the write cache storage;
• and
• if the first cache line is not stored in the write cache storage:
• retrieving the first cache line from memory;
• storing the retrieved first cache line in the write cache storage;
• and
• merging the first of the plurality of partial write requests into the retrieved first cache line.

A machine-readable medium having stored thereon instructions, which when executed by a processor cause said processor to perform:

• receiving a plurality of partial write requests for merging into associated cache lines of write data in write cache storage;
• determining if a first cache line associated with a first of the plurality of partial write requests is stored in the write cache storage;
• and
• if the first cache line is not stored in the write cache storage:
• retrieving the first cache line from memory;
• storing the retrieved first cache line in the write cache storage;
• and
• merging the first of the plurality of partial write requests into the retrieved first cache line.

An apparatus, comprising:

• write cache storage to receive write requests and to store cache lines of write data;
• a flush dispatcher coupled to the write cache storage to dispatch the cache lines to memory;
• control logic to:
• select a first cache line with a first address in the write cache storage for dispatching;
• dispatch the first cache line to memory if the number of cache lines in the write cache storage exceeds a first predetermined value;
• not dispatch any of the cache lines to memory if the number of cache lines in the write cache storage does not exceed the first predetermined value;
• determine if a second cache line in the write cache storage has a second address within a predetermined range of the first address;
• dispatch the second cache line if the second address is within the predetermined range of the first address;
• determine if a third cache line associated with a particular one of a plurality of partial write requests is stored in the write cache storage;
• if the third cache line is not stored in the write cache storage:
• retrieve the third cache line from memory;
• store the retrieved third cache line in the write cache storage;
• and
• merge the particular one of the plurality of partial write requests into the retrieved third cache line.