Linear summation multiplier array implementation for both signed and unsigned multiplication

A system comprising:

• multiplier for generating a product of at least two operands;
• said multiplier comprising a linear summation array for summing partial products of said at least two operands, wherein said linear summation array is arranged to enable both signed and unsigned multiplication;
• wherein said linear summation array is implemented to generate a product of operands A and B as a result of ((SA*SB*22N−2)+(SA*(−1)*2N−1*B′)+(SB*(−1)*2N−1*A′)+(A′*B′)) when performing signed multiplication, wherein N is the number of bits in each operand, SA is the sign bit for operand A, SB is the sign bit for operand B, A′ is the bits of operand A excluding its sign bit, and B′ is the bits of operand B excluding its sign bit;
• and
• wherein said linear summation array is implemented to generate a product of operands A and B as a result of ((SA*SB*22N−2)+(SA*2N−1*B′)+(SB*2N−1*A′)+(A′*B′)) when performing unsigned multiplication, wherein N is the number of bits in each operand, SA is the most significant bit for operand A, SB is the most significant bit for operand B, A′ is the bits of operand A excluding its most significant bit, and B′ is the bits of operand B excluding its most significant bit.

A method of performing multiplication comprising the steps of:

• receiving at least two operands, A and B, in a multiplier;
• identifying whether signed or unsigned multiplication is desired;
• if signed multiplication is desired, then computing the product of said at least two operands A and B as a result of
• ((SA*SB*22N−2)+(SA*(−1)*2N−1*B′)+(SB*(−1)*2N−1*A′)+(A′*B′)), wherein N is the number of bits in each operand, SA is the sign bit for operand A, SB is the sign bit for operand B, A′ is the bits of operand A excluding its sign bit, and B′ is the bits of operand B excluding its sign bit;
• and
• if unsigned multiplication is desired, then computing the product of said at least two operands A and B as a result of ((SA*SB*22N−2)+(SA*2N−1*B′)+(SB*2N−1*A′)+(A′*B′)), wherein N is the number of bits in each operand, SA is the most significant bit for operand A, SB is the most significant bit for operand B, A′ is the bits of operand A excluding its most significant bit, and B′ is the bits of operand B excluding its most significant bit.