Digital observation system

A digital observation system comprising:

• a digital camera including:
• a charge coupled device (CCD) image sensor memory adapted to store video data;
• a CCD image sensor adapted to transmit the stored video data in analog RGB color space format native to the CCD image sensor (analog RGB data), wherein the CCD image sensor comprises the CCD image sensor memory;
• a correlated double sampling (CDS) circuit adapted to receive the analog RGB data from the CCD image sensor and convert the analog RGB data into digital RGB data, wherein the CDS circuit is operably coupled to the CCD image sensor;
• a programmable logic device (PLD) adapted to:
• receive the transmitted digital RGB data from the CDS circuit;
• convert the received digital RGB data into YUV color space format (digital YUV data);
• and
• transmit the digital YUV data to the CDS circuit, wherein the digital camera PLD interfaces to the CDS circuit;
• and
• a physical interface adapted to receive the digital YUV data and transmit the digital YUV data with reduced operational overhead and increased operational functionality, wherein the physical interface is operably coupled to the CDS circuit and wherein the digital camera PLD interfaces to the physical interface;
• and
• a base unit including:
• a base unit physical interface adapted to receive the digital YUV data with the reduced operational overhead and the increased operational functionality from the digital camera physical interface;
• a base unit PLD operably coupled to the base unit physical interface;
• and
• a display adapted to display the digital YUV data with reduced operational overhead and increased operational functionality, wherein the display is operably coupled to the PLD.

A digital observation system comprising:

• a first module including:
• a memory adapted to store video data;
• a first circuit adapted to transmit the stored video data in a first representation of a first format, wherein the first circuit comprises the memory;
• a second circuit adapted to receive the data in the first representation of the first format from the first circuit and convert the data in the first representation of the first format into a second representation of the first format, wherein the first circuit is operably coupled to the second circuit;
• a third circuit adapted to control timing signals to the first circuit to transmit the data in the first representation of the first format to the second circuit, wherein the third circuit interfaces to the first circuit and to the second circuit;
• and
• a fourth circuit adapted to receive the data in the second representation of the first format from the second circuit and transmit the data in the second representation of the first format, wherein the fourth circuit is operably coupled to the second circuit;
• and
• a second module including:
• a first circuit adapted to receive the transmitted data in the second representation of the first format;
• a second circuit;
• and
• a third circuit adapted to control timing signals to the first circuit of the second module to transmit the data in the second representation of the first format for display via the second circuit, wherein the third circuit interfaces to the first circuit of the second module and interfaces to the second circuit of the second module.

A digital camera comprising:

• a memory adapted to store video data;
• a first circuit adapted to transmit the stored video data in a first representation of a first format, wherein the first circuit comprises the memory;
• a second circuit adapted to receive the data in the first representation of the first format from the first circuit and convert the data in the first representation of the first format into a second representation of the first format, wherein the first circuit is operably coupled to the second circuit;
• a third circuit adapted to control timing signals to the first circuit to transmit the data in the first representation of the first format to the second circuit, wherein the third circuit interfaces to the first circuit and to the second circuit;
• and
• a fourth circuit adapted to receive the data in the second representation of the first format from the second circuit and transmit the data in the second representation of the first format, wherein the fourth circuit is operably coupled to the second circuit.

A digital camera comprising:

• a memory adapted to store video data;
• a first circuit adapted to transmit the stored video data in a first format, wherein the first circuit comprises the memory;
• a second circuit adapted to receive the data in the first representation of the first format from the first circuit, wherein the first circuit is operably coupled to the second circuit;
• a third circuit adapted to:
• control timing signals to the first circuit to transmit the data in the first format to the second circuit;
• and
• convert the data in the first format into a second format, wherein the third circuit interfaces to the first circuit and to the second circuit;
• and
• a fourth circuit adapted to receive the data in the second format from the second circuit and transmit the data in the second format, wherein the fourth circuit is operably coupled to the second circuit.

A base unit comprising:

• a first circuit adapted to receive transmitted data in a second representation of a first format;
• a second circuit;
• and
• a third circuit adapted to control timing signals to the first circuit to transmit the data in the second representation of the first format for display via the second circuit, wherein the third circuit interfaces to the first circuit and to the second circuit.

A base unit comprising:

• a physical interface adapted to receive digital YUV data with reduced operational overhead and increased operational functionality from a digital camera physical interface;
• a programmable logic device (PLD) operably coupled to the base unit physical interface;
• and
• a display adapted to display the digital YUV data with reduced operational overhead and increased operational functionality, wherein the display is operably coupled to the PLD.

A digital camera programmable logic device (PLD) adapted to:

• control timing signals to a CCD image sensor to transmit analog RGB data to a CDS circuit where the analog RGB data is converted to digital RGB data;
• and
• delay one line of the digital RGB data transmission when a transmission error correction occurs;
• wherein the digital RGB data transmission comprises reduced operational overhead and increased operational functionality;
• wherein the operational overhead includes at least one of:
• a multi-drop operation;
• error detection;
• source addressing;
• destination addressing;
• and
• multi-speed operation;
• and
• wherein the operational functionality includes at least one of:
• header data;
• secondary data;
• and
• error correction.

A digital camera programmable logic device (PLD) adapted to:

• receive digital RGB data from a correlated double sampling (CDS) circuit;
• convert the received digital RGB data into digital YUV data;
• and
• transmit the digital YUV data to the CDS circuit, wherein the digital camera PLD interfaces to the CDS circuit.

A method for data processing, the method comprising:

• receiving digital RGB data at a first module;
• storing the data in a second module;
• receiving the data at a third module from the second module;
• reducing a number of bits per pixel of the data in a fourth module;
• increasing a number of bits per pixel of a first set of the data in a fifth module;
• and
• determining a cyclic redundancy check (CRC) for a line of the data in a sixth module.

A method for data processing, the method comprising:

• receiving data by a first module;
• converting, by the first module, the received data to RGB data;
• multiplexing the RGB data into one bit stream by a second module;
• performing a color space conversion from the RGB data to YCrCb data by the second module;
• performing a color space conversion from the YCrCb data to another YCrCb data format by a third module;
• formatting the other YCrCb data to a required output format by a fourth module;
• and
• converting the formatted data to RGB data by a fifth module.