Phase-locked loop oscillator with counter bypass
AssigneeInternational Business Machines Corporation
InventorDarrell Livezey
Life of this patent
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Abstract
A phase-locked loop circuit includes one loop for regulating phase of a VCO with respect to a reference source. In another loop, VCO frequency is compared to frequency of a crystal oscillator. Digital counters divide the frequency of the crystal oscillator and VCO to a common reference frequency. Once the frequency loop is locked, the counter at the output of the crystal oscillator is bypassed. The counter is bypassed by a flip-flop circuit clocked by the crystal oscillator and receiving a scaled input from the VCO. While the VCO frequency error is in the frequency range of correction capability of the phase-locked loop, the output of the flip-flop will duplicate the output of the counter. Thus, the counter can be bypassed and shut off.
Claims17
A phase-locked loop frequency source comprising an error detector, a loop filter receiving an output from said error detector, and a voltage controlled oscillator receiving an input from the loop filter and providing an output frequency;
- a counter coupled to the clocked by said voltage controlled oscillator;
- a crystal oscillator;
- a digital counter coupled to be clocked by said crystal oscillator said first and second digital counters providing outputs for comparison for said error detector;
- said error detector including a lock detect circuit providing a lock signal when the outputs of said digital counters are locked;
- said lock signal being connected to disable one of said digital counters;
- a clock comparison circuit receiving an input from one said digital counter and an oscillator connected to the other of said digital counters, said digital counter providing a clock signal on an earlier corresponding half cycle to enable the oscillator to clock said switch circuit;
- and
- a switching circuit operated by said lock signal to connect the output of said clocking circuit to said error detector in place of the other digital counter when said lock signal is provided.
A method for producing a signal with a phase-locked loop voltage controlled oscillator comprising driving first and second digital counters with a reference frequency and a VCO frequency respectively, providing outputs of said counters to said error detecting means and providing a clocking circuit connected for selectively bypassing one of said digital counters and receiving an enabling input from the other of said digital counters in a clock input from the bypassable digital counters associated oscillator;
- detecting a lock between said reference oscillator and said voltage controlled oscillator;
- and
- in response to detection of a lock disabling said bypassable digital counter and connecting said clocking circuit to the error circuit in place of said bypass digital counter.
Dependencies are inferred from the claim text.