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US 2004/0006750 A1Published application
Method for min-cut and ratio min-cut partitioning
OwnerKuo-Hsing Cheng, Shun-Wen Chenginventors
Life of this patent
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Abstract
The method of Edge-Node Interleave Sort for Leaching and Envelop (ENISLE) comprises mapping a circuit into a V-E plain to transform a circuit information into V-E plain. A plurality of sorting is performed for obtaining min-cut or/and ratio min-cut partitioning. The sorting includes (1) performing a first sorting step from an edge view based on a bottom side of the V-E plain; (2) performing a second sorting step from an node view based on a right side of the V-E plain; (3) performing a third sorting from said edge view based on a top side of the V-E plain; and (4) performing a fourth sorting step from said node view based on a left side of the V-E plain.
Claims21
A method of Edge-Node Interleave Sort for Leaching and Envelop (ENISLE), comprising:
- mapping a circuit into a V-E plain to transform a circuit information into said V-E plain which contains the information of node and edge information, Wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- determining whether V-E pairs distribution on said V-E plain is uniformly or not, if said V-E pairs distribution approaching to non-uniformly distribution, then randomizing said V-E pairs on said V-E plain, otherwise performing following steps for sequentially arranging allocations of the V-E pairs according to the magnitude of each said node or said edge, thereby obtaining min-cut or/and ratio min-cut partitioning;
- performing a first sorting step from an edge view based on a first side of said V-E plain;
- performing a second sorting step from an node view based on a second side of said V-E plain;
- performing a third sorting from said edge view based on a third side of said V-E plain;
- and
- performing a fourth sorting step from said node view based on a fourth side of said V-E plain.
4 more elements
A method for min-cut and/or ratio min-cut partitioning, comprising:
- mapping a circuit into a V-E plain to transform a circuit information into said V-E plain which contains the information of node and edge information, Wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- performing following steps for sequentially arranging allocations of the V-E pairs according to the magnitude of each said node or said edge, thereby obtaining min-cut or/and ratio min-cut partitioning;
- performing a first sorting step from an edge view based on a first side of said V-E plain;
- performing a second sorting step from an node view based on a second side of said V-E plain;
- performing a third sorting from said edge view based on a third side of said V-E plain;
- and
- performing a fourth sorting step from said node view based on a fourth side of said V-E plain.
4 more elements
A method for min-cut and/or ratio min-cut partitioning, comprising:
- mapping a circuit into a V-E plain to transform a circuit information into said V-E plain which contains the information of node and edge information, Wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- determining whether V-E pairs distribution on said V-E plain is uniformly or not, if said V-E pairs distribution approaching to non-uniformly distribution, then randomizing said V-E pairs on said V-E plain, otherwise performing following steps for sequentially arranging allocations of the V-E pairs according to the magnitude of each said node or said edge, thereby obtaining min-cut or/and ratio min-cut partitioning;
- performing a first sorting step from an edge view based on a first side of said V-E plain;
- performing a second sorting step from an node view based on a second side of said V-E plain;
- performing a third sorting from said edge view based on a third side of said V-E plain;
- performing a fourth sorting step from said node view based on a fourth side of said V-E plain;
- initializing node set record;
- performing a fifth sorting step from said node view based on the second side;
- performing a sixth sorting step from said edge view based on said first side/third side;
- determining whether said node set is still interchanged or not? If said node set is no longer interchange then go back to perform said fifth sorting step, otherwise, performing a seventh sorting step from said node view based on said fourth side;
- determining whether said node set still interchange or not? If said node set is still interchange, then performing said fifth sorting step for achieving an optimal min-cut or ratio min-cut partitioning.
8 more elements
A method for display data compression techniques by different light intensity and/or different patterns on a monochrome viewpoint, comprising:
- displaying (V, E) pairs on an initial V-E plain shown on a monitor screen to observe the said initial (V, E) pairs distributed condition, wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- setting L nodes×W edges (V, E) pairs rectangle region to compose a block, wherein said L and W are integers;
- defining the more (V, E) pairs in said block to be displayed by the relatively high light intensity to the less (V, E) pairs in said block;
- and
- watching relatively large size of V-E plain or a whole V-E plain to said initial (V, E) plain on said monitor screen, wherein said exact (V, E) pairs positions still be held, thereby zooming in said V-E plain to watch detail local (V, E) pairs distributed condition, or zooming out to watch global (V, E) pairs distributed condition on said monitor screen.
2 more elements
A method for display data compression techniques by different light intensity and/or different patterns on a monochrome viewpoint, comprising:
- displaying (V, E) pairs on an initial V-E plain shown on a monitor screen to observe the said initial (V, E) pairs distributed condition, wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- setting L nodes×W edges (V, E) pairs rectangle region to compose a block, wherein said L and W are integers;
- defining the less (V, E) pairs in said block to be displayed by the relatively high light intensity to the more (V, E) pairs in said block;
- and
- watching relatively large size of V-E plain or a whole V-E plain to said initial (V, E) plain on said monitor screen, wherein said exact (V, E) pairs positions still be held, thereby zooming in said V-E plain to watch detail local (V, E) pairs distributed condition, or zooming out to watch global (V, E) pairs distributed condition on said monitor screen.
2 more elements
A method for display data compression techniques by different color and/or different patterns on a monochrome viewpoint, comprising:
- displaying (V, E) pairs on an initial V-E plain shown on a monitor screen to observe the said initial (V, E) pairs distributed condition, wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- setting L nodes×W edges (V, E) pairs rectangle region to compose a block, wherein said L and W are integers;
- defining the more (V, E) pairs in said block to be displayed by the relatively bright color to the less (V, E) pairs in said block;
- and
- watching relatively large size of V-E plain or a whole V-E plain to said initial (V, E) plain on said monitor screen, wherein said exact (V, E) pairs positions still be held, thereby zooming in said V-E plain to watch detail local (V, E) pairs distributed condition, or zooming out to watch global (V, E) pairs distributed condition on said monitor screen.
2 more elements
A method for display data compression techniques by different color and/or different patterns on a monochrome viewpoint, comprising:
- displaying (V, E) pairs on an initial V-E plain shown on a monitor screen to observe the said initial (V, E) pairs distributed condition, wherein said V indicates nodes that represent components of said circuit and wherein said E indicates edges that represents the nets of said circuits;
- setting L nodes×W edges (V, E) pairs rectangle region to compose a block, wherein said L and W are integers;
- defining the more (V, E) pairs in said block to be displayed by the relatively bright color to the less (V, E) pairs in said block;
- and
- watching relatively large size of V-E plain or a whole V-E plain to said initial (V, E) plain on said monitor screen, wherein said exact (V, E) pairs positions still be held, thereby zooming in said V-E plain to watch detail local (V, E) pairs distributed condition;
- or zooming out to watch global (V, E) pairs distributed condition on said monitor screen.
3 more elements
Dependencies are inferred from the claim text.