Layer allocating apparatus for multi-layer circuit board

A layer allocating apparatus for a multi-layer circuit board comprising:

• a top signal layer having a plurality of power planes and a plurality of signal layout areas;
• a ground voltage layer under said top signal layer and coupling with a ground voltage, wherein said signal layout areas of said top signal layer take reference to said ground voltage layer;
• a power layer under said ground voltage layer and having a plurality of said power planes and a plurality of ground voltage areas, wherein said ground voltage areas electrically couple with said ground voltage and said power planes and said ground voltage areas are spaced from isolated lines;
• and
• a bottom signal layer under said power layer and having a plurality of said power planes and a plurality of said signal layout areas, wherein said corresponding power planes of said top signal layer, said power layer, and said bottom signal layer couple with others through a plurality of vias, so as to enlarge the total equivalent area of said power planes.

A power layer layout apparatus for a multi-layer circuit board layer allocating apparatus, wherein said layer allocating apparatus comprises a top signal layer, a reference voltage layer, a power layer, and a bottom signal layer, said power layer layout apparatus comprising:

• a plurality of power planes each electrically coupling with a corresponding power plane of said top signal layer and bottom signal layer;
• a plurality of reference voltage areas each electrically coupling with a reference voltage, wherein signal layout areas of said bottom signal layer take reference to said reference voltage areas;
• and
• a plurality of isolated lines for isolating said power planes from said reference voltage areas, so as to prevent interferences from said power planes and said reference voltage areas.