Non-reducible, low temperature sinterable dielectric ceramic composition, multilayer ceramic chip capacitor using the composition and method for preparing the multilayer ceramic chip capacitor

A multilayer ceramic chip capacitor comprising alternately staked, dielectric ceramic layers and internal electrode layers, wherein the dielectric ceramic layers comprise

• BaTiO3;
• MgCO3:
• 0.2 to 3.0 mol;
• at least one selected from Y2O3, Ho2O3, Dy2O3 and Yb2O3:
• 0.05 to 1.5 mol;
• Cr2O3:
• 0.1 to 1.5 mol;
• BaxCa(1−x)SiO3 (provided that 0≦x≦1):
• 0.2 to 3.0 mol;
• and
• Mn2V2O7:
• 0.01 to 1.5 mol, per 100 mol of BaTiO3.

A method for preparing a multilayer ceramic chip capacitor, comprising the steps of:

• calcining MnO and V2O5 at a temperature of 650 to 800° C. to obtain Mn2V2O7 in the form of powder;
• mixing
• BaTiO3,
• MgCO3:
• 0.2 to 3.0 mol,
• at least one selected from Y2O3, Ho2O3, Dy2O3 and Yb2O3:
• 0.05 to 1.5 mol,
• Cr2O3:
• 0.1 to 1.5 mol,
• BaxCa(1−x)SiO3 (provided that 0≦x≦1):
• 0.2 to 3.0 mol, and
• Mn2V2O7:
• 0.01 to 1.5 mol, per 100 mol of BaTiO3, to obtain dielectric material;
• alternately stacking the dielectric material and internal electrode to obtain laminated body;
• and
• sintering laminated body.