Wireless communications transceiver: transmitter using a harmonic rejection mixer and an RF output offset phase-locked loop in a two-step up-conversion architecture & receiver using direct conversion architecture

A wireless communications transmitter circuit comprising, in combination:

• a local oscillator for producing a signal at four times an intermediate frequency;
• a quadrature modulator harmonic rejection mixer responsive to the signal at four times the intermediate frequency for modulating an in-phase base-band signal and a quadrature-phase base-band signal to produce an intermediate frequency signal;
• a filter responsive to the intermediate frequency signal for producing a filtered intermediate frequency signal;
• and
• an RF output offset phase-locked loop responsive to the filtered intermediate frequency signal and responsive to the signal at four times the intermediate frequency for producing an RF transmission signal;
• wherein the local oscillator includes a phase-locked loop having digital circuits for channel selection.

A wireless communications transceiver circuit comprising, in combination:

• a local oscillator including a channel-selecting voltage-controlled oscillator for producing a signal at a multiple of an intermediate frequency for transmission and for producing a receiver local oscillator signal;
• a quadrature modulator responsive to the signal at the multiple of the intermediate frequency for modulating an in-phase base-band signal and a quadrature-phase base-band signal for producing an intermediate frequency signal;
• an RF output offset phase-locked loop responsive to the intermediate frequency signal and responsive to the signal at the multiple of the intermediate frequency for producing an RF transmission signal;
• and
• a direct conversion receiver responsive to the receiver local oscillator signal;
• wherein the local oscillator includes a receiver local oscillator generator circuit for producing the receiver local oscillator signal responsive to channel selection by the channel-selecting voltage-controlled oscillator.

A plural-band wireless communications transceiver circuit for EGSM and DCS or PCS operation comprising, in combination:

• a local oscillator including a channel-selecting voltage-controlled oscillator for producing a signal at a multiple of an intermediate frequency for the transmitter, the intermediate frequency being switchable between EGSM operation and DCS or PCS operation;
• a quadrature modulator harmonic rejection mixer responsive to the signal at the multiple of the intermediate frequency for modulating an in-phase base-band signal and a quadrature-phase base-band signal for producing an intermediate frequency signal;
• a switchable filter responsive to the intermediate frequency signal for producing a filtered intermediate frequency signal, the switchable filter being switchable between EGSM transmission and DCS or PCS transmission;
• an RF output offset phase-locked loop responsive to the filtered intermediate frequency signal and responsive to the signal at the multiple of the intermediate frequency for producing an RF transmission signal;
• and
• a direct conversion receiver responsive to the local oscillator signal for EGSM reception and DCS or PCS reception;
• wherein the local oscillator includes a receiver local oscillator generator circuit for producing a receiver local oscillator signal responsive to channel selection by the channel-selecting voltage-controlled oscillator.

A plural-band wireless communications transceiver circuit for EGSM operation and DCS or PCS operation comprising, in combination:

• a channel-selecting voltage-controlled oscillator;
• a two-step up-conversion plural-band wireless transmitter for EGSM transmission and DCS or PCS transmission upon a transmission channel selected by the channel-selecting voltage-controlled oscillator;
• and
• a direct-conversion plural-band wireless receiver for EGSM reception and DCS or PCS reception of a reception channel selected by the channel-selecting voltage-controlled oscillator.