Method of forming an isolated-grain rugged polysilicon surface via a temperature ramping step

Abstract

A method is disclosed for increasing the surface area of hemispherical-grain polysilicon and for forming a storage-node capacitor plate that can be used in the manufacture of dynamic random access memories (DRAMs). A layer of polycrystalline silicon is deposited on a substrate. This layer is either in-situ doped or doped after it is deposited via implantation or diffusion. Next, an amorphous silicon layer is deposited on top of the polycrystalline silicon layer. Hemispherical-grain (HSG) polysilicon seeds are then grown on the upper surface of the amorphous silicon layer using one of several known techniques. An anneal sequence is then performed in the presence of silane. An initial temperature of about 550° C. is maintained for about 3.5 minutes. At the end of that period, the temperature is ramped at a rate of 2° C. per minutes over a period of about 8 minutes. Upon reaching a temperature of about 568° C., that final temperature is maintained for an additional period of about 6 minutes. During the anneal sequence, silicon atoms within the amorphous silicon layer migrate to the seeded locations and incorporate themselves in the crystal matrices of the HSG seeds, thereby causing them to grow. The ramped temperature during the anneal sequence is highly effective in forming isolated grains of HSG polysilicon. The underlying doped polysilicon layer provides electrical continuity between the isolated grains of HSG polysilicon.

Dependencies are inferred from the claim text.