Compiler program and compilation processing method
AssigneeFujitsu Limited
InventorsKiyofumi Suzuki, Masaki Aoki, Hiroaki Sato
Life of this patent
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Abstract
In a compiler, a source program analysis unit forms an intermediate program by analyzing a source program. A vectorization unit extracts logically vectorizable loops from the intermediate program, gives a SIMD expression to each loop regardless of whether or not the corresponding SIMD instruction exists, and vectorizes all the loops. A vector operation expansion unit performs unrolling expansion of a portion with no corresponding SIMD instruction, selection of an optimum vector length, etc. An instruction scheduling unit optimizes the intermediate program, and assign instructions. A code generation unit forms an object program from the intermediate program.
Claims12
A compiler program for compiling a program executed on a computer equipped with a SIMD mechanism, wherein the compiler program causes the computer executing:
- inputting and analyzing a source program;
- providing a pseudo-SIMD instruction expression for a portion of a loop of the source program to make the loop vectorizable, in a case that a computation in the portion of the loop cannot be expressed as a SIMD instruction on the computer, with reference to the result of analysis of the source program;
- expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- generating an object program on a basis of the result of the expanding.
A compiler program for compiling a program executed on a computer equipped with no SIMD mechanism, wherein the compiler program causes the computer executing:
- inputting and analyzing a source program;
- providing a pseudo-SIMD instruction expression for a computation in a loop of the source program to make the loop vectorizable with reference to the result of analysis of the source program by assuming that the computer has a SIMD mechanism;
- expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- generating an object program on a basis of the result of the expanding.
A recording medium for recording a compiler program to compile a program executed on a computer equipped with a SIMD mechanism, wherein the recording medium records the compiler program to cause the computer executing:
- inputting and analyzing a source program;
- providing a pseudo-SIMD instruction expression for a portion of a loop of the source program to make the loop vectorizable, in a case that a computation in the portion of the loop cannot be expressed as a SIMD instruction on the computer, with reference to the result of analysis of the source program;
- expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- generating an object program on a basis of the result of the expanding.
A recording medium for recording a compiler program to compile a program executed on a computer equipped with no SIMD mechanism, wherein the recording medium records the compiler program to cause the computer executing:
- inputting and analyzing a source program;
- providing a pseudo-SIMD instruction expression for a computation in a loop of the source program to make the loop vectorizable with reference to the result of analysis of the source program by assuming that the computer has a SIMD mechanism;
- expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- generating an object program on a basis of the result of the expanding.
A compilation processing method for compiling a program executed on a computer equipped with a SIMD mechanism, the method comprising:
- inputting and analyzing a source program;
- providing a pseudo-SIMD instruction expression for a portion of a loop of the source program to make the loop vectorizable, in a case that a computation in the portion of the loop cannot be expressed as a SIMD instruction on the computer, with reference to the result of analysis of the source program;
- expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- generating an object program on a basis of the result of the expanding.
A compilation processing method for compiling a program executed on a computer equipped with no SIMD mechanism, the method comprising:
- inputting and analyzing a source program;
- providing a pseudo-SIMD instruction expression for a computation in a loop of the source program to make the loop vectorizable with reference to the result of analysis of the source program by assuming that the computer has a SIMD mechanism;
- expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- generating an object program on a basis of the result of the expanding.
A compilation processing apparatus for compiling a program executed on a computer equipped with a SIMD mechanism, the apparatus comprising:
- means for inputting and analyzing a source program;
- means for providing a pseudo-SIMD instruction expression for a portion of a loop of the source program to make the loop vectorizable, in a case that a computation in the portion of the loop cannot be expressed as a SIMD instruction on the computer, with reference to the result of analysis of the source program;
- means for expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- means for generating an object program on a basis of the result of the expanding.
A compilation processing apparatus for compiling a program executed on a computer equipped with no SIMD mechanism, the apparatus comprising:
- means for inputting and analyzing a source program;
- means for providing a pseudo-SIMD instruction expression for a computation in a loop of the source program to make the loop vectorizable with reference to the result of analysis of the source program by assuming that the computer has a SIMD mechanism;
- means for expanding the computation portion of the vectorizable loop expressed by the pseudo-SIMD instruction expression by replacing the computation portion with sequential instructions in the loop;
- and
- means for generating an object program on a basis of the result of the expanding.
Dependencies are inferred from the claim text.